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[86.58.32.107]) by smtp.gmail.com with ESMTPSA id a1-20020a1709063e8100b006ce06ed8aa7sm3501887ejj.142.2022.02.27.06.50.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 27 Feb 2022 06:50:38 -0800 (PST) From: Jernej Skrabec To: ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de Cc: mchehab@kernel.org, nicolas@ndufresne.ca, hverkuil-cisco@xs4all.nl, gregkh@linuxfoundation.org, wens@csie.org, samuel@sholland.org, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-staging@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, Jernej Skrabec Subject: [RFC PATCH 8/8] media: hantro: sunxi: Increase frequency Date: Sun, 27 Feb 2022 15:49:26 +0100 Message-Id: <20220227144926.3006585-9-jernej.skrabec@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220227144926.3006585-1-jernej.skrabec@gmail.com> References: <20220227144926.3006585-1-jernej.skrabec@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220227_065040_425654_DB1AA936 X-CRM114-Status: GOOD ( 11.20 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org It turns Android boxes use G2 core on much higher frequency. Let's match that here too. Signed-off-by: Jernej Skrabec --- drivers/staging/media/hantro/sunxi_vpu_hw.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/staging/media/hantro/sunxi_vpu_hw.c b/drivers/staging/media/hantro/sunxi_vpu_hw.c index 8d8a8937d6aa..c86749c406fc 100644 --- a/drivers/staging/media/hantro/sunxi_vpu_hw.c +++ b/drivers/staging/media/hantro/sunxi_vpu_hw.c @@ -50,7 +50,7 @@ static const struct hantro_fmt sunxi_vpu_dec_fmts[] = { static int sunxi_vpu_hw_init(struct hantro_dev *vpu) { - clk_set_rate(vpu->clocks[0].clk, 300000000); + clk_set_rate(vpu->clocks[0].clk, 576000000); return 0; }