From patchwork Fri Sep 30 05:12:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Jarno X-Patchwork-Id: 12994906 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 54972C433FE for ; Fri, 30 Sep 2022 05:18:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=RjtBlYMG4oZpAq8EUzvhh6gZJ4G5p29MkAhUKj3RtxU=; b=2iWuyYmjO+fq+1 3KH5amNFTZBnMIv3B7PSPjZmrMPPB6plLPZDmTPcHcawVefWlR/46X/dd6fDRbmAOJXxtRIc+sQGE F9S/DeOXhbiSgTvUr2fHKjrYAQXyp0Ora8XvThsqI+IBRiu7GRqpzqHxCIregmgnSpneOZQDLyvyl UyIFYrWJ8YdADI4VE0lMLO3JptQYf6tYmU/QdrU7MAo/sO9ZKnsFPpMnTkqX3/0R0PN2Y1XpxBXuS EndOuBUDjwUPYU99iJCB/DoraYECWPsuQQo4iO/duvC96X2bxzOoGEQduaMzEMgMtlE8EEnagkihb XWFC0elhRazDWhD7b8mQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oe8Pe-007G2Y-Qs; Fri, 30 Sep 2022 05:18:14 +0000 Received: from hall.aurel32.net ([2001:bc8:30d7:100::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oe8Ki-007CxX-Jd; Fri, 30 Sep 2022 05:13:15 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=aurel32.net ; s=202004.hall; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Content-Type:From:Reply-To: Subject:Content-ID:Content-Description:X-Debbugs-Cc; bh=DDAhsfiRYbh3/+MkjL9NfNU/4tzDdoR0tDFSXdyD3TA=; b=E07JNPks7+cdyR5S/HjUEMQalp 8dujHPsKnIJGQ33116zFm+44j+nJCm/fxVt89mqg8K70BPLijnVuWVUEmPf37FdLNL+MQZ9NJd73l U1LiahMinRAzf09bxedNJe9svtoDpl4UjQOqAoC8uxZ9ysgmjnjFy0eJy8FGJmK4kB3DUkxJed243 jqhpDo3nOaeIirrjlNNHh7tU7SK6jdhG8+/8ZMDBP+ulKjYyCcFdI9jFPm7bIIRferQZYZaHuHU/v 5CTxsU/2eIr5JdQsVJ11JdDcOB4/2hSp5AY3orvKzMnvZ1Q3BU4H2dVW3lM9XnDj6455wB21WH+q5 PILNY7xA==; Received: from [2a01:e34:ec5d:a741:8a4c:7c4e:dc4c:1787] (helo=ohm.rr44.fr) by hall.aurel32.net with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1oe8Kg-00Djfx-9C; Fri, 30 Sep 2022 07:13:06 +0200 Received: from aurel32 by ohm.rr44.fr with local (Exim 4.96) (envelope-from ) id 1oe8Kf-001dwH-22; Fri, 30 Sep 2022 07:13:05 +0200 From: Aurelien Jarno To: Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-arm-kernel@lists.infradead.org (moderated list:ARM/Rockchip SoC support), linux-rockchip@lists.infradead.org (open list:ARM/Rockchip SoC support), linux-kernel@vger.kernel.org (open list) Cc: Dongjin Kim , Aurelien Jarno , Dan Johansen Subject: [PATCH v3 12/13] arm64: dts: rockchip: Add PCIEe v3 nodes to ODROID-M1 Date: Fri, 30 Sep 2022 07:12:45 +0200 Message-Id: <20220930051246.391614-13-aurelien@aurel32.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220930051246.391614-1-aurelien@aurel32.net> References: <20220930051246.391614-1-aurelien@aurel32.net> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220929_221313_690727_F6E5432A X-CRM114-Status: UNSURE ( 9.60 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Add nodes to ODROID-M1 to support PCIe v3 on the M2 slot. Signed-off-by: Aurelien Jarno Tested-by: Dan Johansen --- .../boot/dts/rockchip/rk3568-odroid-m1.dts | 34 +++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts index bd24ccf94e76..2f685c606bb9 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts @@ -96,6 +96,19 @@ simple-audio-card,codec { }; }; + vcc3v3_pcie: vcc3v3-pcie-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_pcie"; + enable-active-high; + gpio = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc3v3_pcie_en_pin>; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us = <5000>; + vin-supply = <&vcc3v3_sys>; + }; + vcc3v3_sys: vcc3v3-sys-regulator { compatible = "regulator-fixed"; regulator-name = "vcc3v3_sys"; @@ -479,6 +492,18 @@ rgmii_phy0: ethernet-phy@0 { }; }; +&pcie30phy { + status = "okay"; +}; + +&pcie3x2 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie_reset_pin>; + reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&vcc3v3_pcie>; + status = "okay"; +}; + &pinctrl { fspi { fspi_dual_io_pins: fspi-dual-io-pins { @@ -503,6 +528,15 @@ led_work_pin: led-work-pin { }; }; + pcie { + pcie_reset_pin: pcie-reset-pin { + rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + vcc3v3_pcie_en_pin: vcc3v3-pcie-en-pin { + rockchip,pins = <4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + pmic { pmic_int_l: pmic-int-l { rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;