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[92.176.231.205]) by smtp.gmail.com with ESMTPSA id j6-20020a05600c190600b003ef6bc71cccsm7527075wmq.27.2023.03.28.00.33.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Mar 2023 00:33:16 -0700 (PDT) From: Javier Martinez Canillas To: linux-kernel@vger.kernel.org Cc: Peter Robinson , Tom , Robert Mader , Laurent Pinchart , Martijn Braam , Ondrej Jirman , Jacopo Mondi , =?utf-8?q?Kamil_Trzci=C5=84sk?= =?utf-8?q?i?= , Javier Martinez Canillas , Heiko Stuebner , Jarrah Gosbell , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: [PATCH v3 1/2] arm64: dts: rk3399-pinephone-pro: Add internal display support Date: Tue, 28 Mar 2023 09:33:08 +0200 Message-Id: <20230328073309.1743112-2-javierm@redhat.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230328073309.1743112-1-javierm@redhat.com> References: <20230328073309.1743112-1-javierm@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230328_003320_422894_EC9BEE3F X-CRM114-Status: GOOD ( 14.78 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org From: Martijn Braam The phone's display is using a Hannstar LCD panel. Support it by adding a panel DT node and all needed nodes (backlight, MIPI DSI, regulators, etc). Signed-off-by: Martijn Braam Co-developed-by: Kamil Trzciński Signed-off-by: Kamil Trzciński Co-developed-by: Ondrej Jirman Signed-off-by: Ondrej Jirman Signed-off-by: Javier Martinez Canillas Tested-by: Ondrej Jirman --- Changes in v3: - Fix some ./scripts/checkpatch.pl --strict warnings. - Add Ondrej Jirman Tested-by tag. - Change PWM period to 50000 since 20 kHz is recommended (Ondrej Jirman). - Remove useless comments for the panel regulators (Ondrej Jirman). - Drop unneeded pinctrl pull down conf for pins that either already have a pull-down resistor or are already driven by the SoC (Ondrej Jirman). - Remove "pwm-delay-us" property not supported in mainline (Ondrej Jirman). Changes in v2: - Drop touchscreen node because used the wrong compatible (Ondrej Jirman). - Fix assigned-clock-parents in vopb node (Ondrej Jirman). - Add vopl and vopl nodes. .../dts/rockchip/rk3399-pinephone-pro.dts | 95 +++++++++++++++++++ 1 file changed, 95 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts index a0795a2b1cb1..539b36e8bff5 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts @@ -29,6 +29,11 @@ chosen { stdout-path = "serial2:115200n8"; }; + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm0 0 50000 0>; + }; + gpio-keys { compatible = "gpio-keys"; pinctrl-names = "default"; @@ -102,6 +107,30 @@ wifi_pwrseq: sdio-wifi-pwrseq { /* WL_REG_ON on module */ reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; }; + + /* MIPI DSI panel 1.8v supply */ + vcc1v8_lcd: vcc1v8-lcd { + compatible = "regulator-fixed"; + enable-active-high; + regulator-name = "vcc1v8_lcd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc3v3_sys>; + gpio = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + }; + + /* MIPI DSI panel 2.8v supply */ + vcc2v8_lcd: vcc2v8-lcd { + compatible = "regulator-fixed"; + enable-active-high; + regulator-name = "vcc2v8_lcd"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + vin-supply = <&vcc3v3_sys>; + gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + }; }; &cpu_alert0 { @@ -139,6 +168,11 @@ &emmc_phy { status = "okay"; }; +&gpu { + mali-supply = <&vdd_gpu>; + status = "okay"; +}; + &i2c0 { clock-frequency = <400000>; i2c-scl-rising-time-ns = <168>; @@ -362,6 +396,39 @@ &io_domains { status = "okay"; }; +&mipi_dsi { + status = "okay"; + clock-master; + + ports { + mipi_out: port@1 { + #address-cells = <0>; + #size-cells = <0>; + reg = <1>; + + mipi_out_panel: endpoint { + remote-endpoint = <&mipi_in_panel>; + }; + }; + }; + + panel@0 { + compatible = "hannstar,hsd060bhw4"; + reg = <0>; + backlight = <&backlight>; + reset-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_LOW>; + vcc-supply = <&vcc2v8_lcd>; + iovcc-supply = <&vcc1v8_lcd>; + pinctrl-names = "default"; + + port { + mipi_in_panel: endpoint { + remote-endpoint = <&mipi_out_panel>; + }; + }; + }; +}; + &pmu_io_domains { pmu1830-supply = <&vcc_1v8>; status = "okay"; @@ -429,6 +496,10 @@ &sdio0 { status = "okay"; }; +&pwm0 { + status = "okay"; +}; + &sdmmc { bus-width = <4>; cap-sd-highspeed; @@ -479,3 +550,27 @@ bluetooth { &uart2 { status = "okay"; }; + +&vopb { + status = "okay"; + assigned-clocks = <&cru DCLK_VOP0_DIV>, <&cru DCLK_VOP0>, + <&cru ACLK_VOP0>, <&cru HCLK_VOP0>; + assigned-clock-rates = <0>, <0>, <400000000>, <100000000>; + assigned-clock-parents = <&cru PLL_GPLL>, <&cru DCLK_VOP0_DIV>; +}; + +&vopb_mmu { + status = "okay"; +}; + +&vopl { + status = "okay"; + assigned-clocks = <&cru DCLK_VOP1_DIV>, <&cru DCLK_VOP1>, + <&cru ACLK_VOP1>, <&cru HCLK_VOP1>; + assigned-clock-rates = <0>, <0>, <400000000>, <100000000>; + assigned-clock-parents = <&cru PLL_GPLL>, <&cru DCLK_VOP1_DIV>; +}; + +&vopl_mmu { + status = "okay"; +};