| Message ID | 20230522173423.64691-3-sebastian.reichel@collabora.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add RK3588 SATA support | expand |
On Mon, May 22, 2023 at 07:34:19PM +0200, Sebastian Reichel wrote: > Just like RK3568, the RK3588 has a DWC based AHCI controller. > > Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> > --- > .../devicetree/bindings/ata/snps,dwc-ahci-common.yaml | 8 ++++++-- > Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml | 6 ++++-- > 2 files changed, 10 insertions(+), 4 deletions(-) > > diff --git a/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml b/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml > index c1457910520b..34c5bf65b02d 100644 > --- a/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml > +++ b/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml > @@ -31,11 +31,11 @@ properties: > PM-alive clock, RxOOB detection clock, embedded PHYs reference (Rx/Tx) > clock, etc. > minItems: 1 > - maxItems: 4 > + maxItems: 6 > > clock-names: > minItems: 1 > - maxItems: 4 > + maxItems: 6 > items: > oneOf: > - description: Application APB/AHB/AXI BIU clock > @@ -48,6 +48,10 @@ properties: > const: pmalive > - description: RxOOB detection clock > const: rxoob > + - description: PHY Transmit Clock > + const: asic > + - description: PHY Receive Clock > + const: rbc > - description: SATA Ports reference clock > const: ref My brain is failing me at the moment, what is the reason for adding these into the middle of the list, as opposed to tacking them onto the end? Apologies if this came up on some past version that Rob or Krzysztof had a look at. Cheers, Conor.
On Mon, May 22, 2023 at 07:34:19PM +0200, Sebastian Reichel wrote: > Just like RK3568, the RK3588 has a DWC based AHCI controller. > > Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> > --- > .../devicetree/bindings/ata/snps,dwc-ahci-common.yaml | 8 ++++++-- > Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml | 6 ++++-- > 2 files changed, 10 insertions(+), 4 deletions(-) > > diff --git a/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml b/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml > index c1457910520b..34c5bf65b02d 100644 > --- a/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml > +++ b/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml > @@ -31,11 +31,11 @@ properties: > PM-alive clock, RxOOB detection clock, embedded PHYs reference (Rx/Tx) > clock, etc. > minItems: 1 > - maxItems: 4 > + maxItems: 6 > > clock-names: > minItems: 1 > - maxItems: 4 > + maxItems: 6 > items: > oneOf: > - description: Application APB/AHB/AXI BIU clock > @@ -48,6 +48,10 @@ properties: > const: pmalive > - description: RxOOB detection clock > const: rxoob > + - description: PHY Transmit Clock > + const: asic > + - description: PHY Receive Clock > + const: rbc > - description: SATA Ports reference clock > const: ref This part looks good but as I mentioned in my comment to the previous patchset revision these are generic clocks. Extending the common schema could be done in a framework of a preparation patch with the justification described in my comment back then. > > diff --git a/Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml b/Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml > index 5afa4b57ce20..c6a0d6c8b62c 100644 > --- a/Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml > +++ b/Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml > @@ -23,9 +23,11 @@ properties: > const: snps,dwc-ahci > - description: SPEAr1340 AHCI SATA device > const: snps,spear-ahci > - - description: Rockhip RK3568 AHCI controller > + - description: Rockhip AHCI controller > items: > - - const: rockchip,rk3568-dwc-ahci > + - enum: > + - rockchip,rk3568-dwc-ahci > + - rockchip,rk3588-dwc-ahci Regarding this part. I would suggest to just create a separate DT-schema instead of extending the generic one. See my comment to the next patch in the series and my suggestion posted in a comment to the previous patchset revision. -Serge(y) > - const: snps,dwc-ahci > > patternProperties: > -- > 2.39.2 >
diff --git a/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml b/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml index c1457910520b..34c5bf65b02d 100644 --- a/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml +++ b/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml @@ -31,11 +31,11 @@ properties: PM-alive clock, RxOOB detection clock, embedded PHYs reference (Rx/Tx) clock, etc. minItems: 1 - maxItems: 4 + maxItems: 6 clock-names: minItems: 1 - maxItems: 4 + maxItems: 6 items: oneOf: - description: Application APB/AHB/AXI BIU clock @@ -48,6 +48,10 @@ properties: const: pmalive - description: RxOOB detection clock const: rxoob + - description: PHY Transmit Clock + const: asic + - description: PHY Receive Clock + const: rbc - description: SATA Ports reference clock const: ref diff --git a/Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml b/Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml index 5afa4b57ce20..c6a0d6c8b62c 100644 --- a/Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml +++ b/Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml @@ -23,9 +23,11 @@ properties: const: snps,dwc-ahci - description: SPEAr1340 AHCI SATA device const: snps,spear-ahci - - description: Rockhip RK3568 AHCI controller + - description: Rockhip AHCI controller items: - - const: rockchip,rk3568-dwc-ahci + - enum: + - rockchip,rk3568-dwc-ahci + - rockchip,rk3588-dwc-ahci - const: snps,dwc-ahci patternProperties:
Just like RK3568, the RK3588 has a DWC based AHCI controller. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> --- .../devicetree/bindings/ata/snps,dwc-ahci-common.yaml | 8 ++++++-- Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml | 6 ++++-- 2 files changed, 10 insertions(+), 4 deletions(-)