From patchwork Wed Aug 23 13:39:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: lizetao X-Patchwork-Id: 13362549 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E1D97EE49B0 for ; Wed, 23 Aug 2023 13:43:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=f4Lt+PccLY3opn/SB++j+r7vDBRFDl+EYxo73lWPKgQ=; b=M2ghon9vNUXzLJ iv9EOgPdOrvIVwHxni6px2C5YYHG4NGsiv+GDLBkZtQ16X0EfxdOE4Bu9V2006HJ2d+gGd4aTSGUE BiHOGcQi7sIRhotvIsX05HY2yK73459iBig+//6KB1Om+wfBfvJq8VYiEXS38w+H+pYCTqQVh3FJa j/VU2EssyeWy94TVMbpu7TaPKQxtOJVORuJxRMY8PUx6we49O1gj1YN1sOh2rMwws+iBBUCupInt/ 42D/9/cq68Z9OwCbCWM5OwG2kT5WIIfRU/lUjRf2qbvTRiLWEb4VgeDL2WvXI3sDToKZQjbqKihD7 D5Hp15NnMbpYJOZP5nGg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qYo97-000l5a-1F; Wed, 23 Aug 2023 13:43:41 +0000 Received: from szxga03-in.huawei.com ([45.249.212.189]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qYo5i-000hRw-2C; Wed, 23 Aug 2023 13:40:16 +0000 Received: from kwepemi500012.china.huawei.com (unknown [172.30.72.55]) by szxga03-in.huawei.com (SkyGuard) with ESMTP id 4RW6hG4ZB9zLpCH; Wed, 23 Aug 2023 21:37:02 +0800 (CST) Received: from huawei.com (10.90.53.73) by kwepemi500012.china.huawei.com (7.221.188.12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.31; Wed, 23 Aug 2023 21:40:06 +0800 From: Li Zetao To: CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Jonathan Cameron Subject: [PATCH -next v2 15/25] spi: meson-spicc: Use helper function devm_clk_get_enabled() Date: Wed, 23 Aug 2023 21:39:28 +0800 Message-ID: <20230823133938.1359106-16-lizetao1@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230823133938.1359106-1-lizetao1@huawei.com> References: <20230822131237.1022815-1-lizetao1@huawei.com> <20230823133938.1359106-1-lizetao1@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.90.53.73] X-ClientProxiedBy: dggems702-chm.china.huawei.com (10.3.19.179) To kwepemi500012.china.huawei.com (7.221.188.12) X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230823_064011_280573_2C28F504 X-CRM114-Status: UNSURE ( 9.84 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Since commit 7ef9651e9792 ("clk: Provide new devm_clk helpers for prepared and enabled clocks"), devm_clk_get() and clk_prepare_enable() can now be replaced by devm_clk_get_enabled() when driver enables (and possibly prepares) the clocks for the whole lifetime of the device. Moreover, it is no longer necessary to unprepare and disable the clocks explicitly. Reviewed-by: Jonathan Cameron Signed-off-by: Li Zetao --- v1 -> v2: None drivers/spi/spi-meson-spicc.c | 33 ++++++--------------------------- 1 file changed, 6 insertions(+), 27 deletions(-) diff --git a/drivers/spi/spi-meson-spicc.c b/drivers/spi/spi-meson-spicc.c index 43d134f4b42b..1f2d26254e03 100644 --- a/drivers/spi/spi-meson-spicc.c +++ b/drivers/spi/spi-meson-spicc.c @@ -820,7 +820,7 @@ static int meson_spicc_probe(struct platform_device *pdev) goto out_master; } - spicc->core = devm_clk_get(&pdev->dev, "core"); + spicc->core = devm_clk_get_enabled(&pdev->dev, "core"); if (IS_ERR(spicc->core)) { dev_err(&pdev->dev, "core clock request failed\n"); ret = PTR_ERR(spicc->core); @@ -828,7 +828,7 @@ static int meson_spicc_probe(struct platform_device *pdev) } if (spicc->data->has_pclk) { - spicc->pclk = devm_clk_get(&pdev->dev, "pclk"); + spicc->pclk = devm_clk_get_enabled(&pdev->dev, "pclk"); if (IS_ERR(spicc->pclk)) { dev_err(&pdev->dev, "pclk clock request failed\n"); ret = PTR_ERR(spicc->pclk); @@ -836,22 +836,10 @@ static int meson_spicc_probe(struct platform_device *pdev) } } - ret = clk_prepare_enable(spicc->core); - if (ret) { - dev_err(&pdev->dev, "core clock enable failed\n"); - goto out_master; - } - - ret = clk_prepare_enable(spicc->pclk); - if (ret) { - dev_err(&pdev->dev, "pclk clock enable failed\n"); - goto out_core_clk; - } - spicc->pinctrl = devm_pinctrl_get(&pdev->dev); if (IS_ERR(spicc->pinctrl)) { ret = PTR_ERR(spicc->pinctrl); - goto out_clk; + goto out_master; } device_reset_optional(&pdev->dev); @@ -878,31 +866,25 @@ static int meson_spicc_probe(struct platform_device *pdev) ret = meson_spicc_pow2_clk_init(spicc); if (ret) { dev_err(&pdev->dev, "pow2 clock registration failed\n"); - goto out_clk; + goto out_master; } if (spicc->data->has_enhance_clk_div) { ret = meson_spicc_enh_clk_init(spicc); if (ret) { dev_err(&pdev->dev, "clock registration failed\n"); - goto out_clk; + goto out_master; } } ret = devm_spi_register_master(&pdev->dev, master); if (ret) { dev_err(&pdev->dev, "spi master registration failed\n"); - goto out_clk; + goto out_master; } return 0; -out_clk: - clk_disable_unprepare(spicc->pclk); - -out_core_clk: - clk_disable_unprepare(spicc->core); - out_master: spi_master_put(master); @@ -916,9 +898,6 @@ static void meson_spicc_remove(struct platform_device *pdev) /* Disable SPI */ writel(0, spicc->base + SPICC_CONREG); - clk_disable_unprepare(spicc->core); - clk_disable_unprepare(spicc->pclk); - spi_master_put(spicc->master); }