From patchwork Wed Dec 20 15:27:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hugues FRUCHET X-Patchwork-Id: 13500252 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 58570C3DA6E for ; Wed, 20 Dec 2023 15:29:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=qQqLFDf6aPTdujczzMMQwJ9IE6ze30iSVS5Lz58lRBk=; b=U+/MwfJv0lmss6 p609OPFJ3hWg+XnOBUe+IVMj/LTkZllJEPHTx7jOTu5lmLPJjGvx528ly9e2Q+hVBpSWhsn2y82Si FaHm3Z0GZ86b8dFDOUyRGmQbEnkqD78ttUG6f3okLYJPQthhtd29tHvcMfbD78XNyKHbW8sGoUM50 THY1WcWqkLv/ZbsvOF/KrrZUDl8+nVgiglwyoK8vi2wLAxc16p9lDMdjSAouX8kupyYfJnDjL7iQU 1H06oiMQ8pxbGUZUxUwbYNLOhepLaxtMO2YojX0PWBlX3CO+cS7ADtQ51FDyK9bPyX/QIha7H1U/P uSTV/Elf3c82aXc1lHhw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rFyVB-000FSW-2d; Wed, 20 Dec 2023 15:28:53 +0000 Received: from mx08-00178001.pphosted.com ([91.207.212.93] helo=mx07-00178001.pphosted.com) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1rFyV9-000FRB-0o; Wed, 20 Dec 2023 15:28:52 +0000 Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.22/8.17.1.22) with ESMTP id 3BKAf2YH011895; Wed, 20 Dec 2023 16:28:39 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= selector1; bh=gOTJOkgkUXjyDgxkghIjHED6KsoYJ6xYXo9usGGB+Xk=; b=RH jxNMA6pwf3Oh7gds5r32LGVowam+bdSUMq+QvqZ8P4GbpbCVvh0YUvvA6to/oczM 6SkM7c+Zr66tofKFwkc+ZaEDTB/r/q33kgUa4Xs5iciAMoBkFTQHB4/qreu9C1gl hKe+S5mC9bf/5yu5INzFmrs6/LZx2uAyZCX8FijJtTIbcUOkLSophylMsITwUi23 YiI/c9T7Fi3QPRAP4e2d0TTn66IIMFfmnaH+aOqn4s1dJ2+aQftQwn7ECFOkLy2f QlaP/QATCJxal+tLtr1XV8KllRFW8tKKj6WZlHxVUJcUzO5VmWBUAUCXlhsi+Qfq dTUx3ywdPFjhmNjxnYaQ== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3v13nhhvuc-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 20 Dec 2023 16:28:39 +0100 (CET) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id BB3C1100057; Wed, 20 Dec 2023 16:28:38 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id AF65121ED2E; Wed, 20 Dec 2023 16:28:38 +0100 (CET) Received: from localhost (10.201.20.120) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Wed, 20 Dec 2023 16:28:38 +0100 From: Hugues Fruchet To: Ezequiel Garcia , Philipp Zabel , Andrzej Pietrasiewicz , Nicolas Dufresne , Sakari Ailus , Benjamin Gaignard , Laurent Pinchart , Daniel Almeida , Benjamin Mugnier , Heiko Stuebner , Mauro Carvalho Chehab , Hans Verkuil , , Maxime Coquelin , Alexandre Torgue , , Rob Herring , Krzysztof Kozlowski , Conor Dooley , , , , CC: Hugues Fruchet , Marco Felsch , Adam Ford Subject: [PATCH v4 5/5] arm64: dts: st: add video encoder support to stm32mp255 Date: Wed, 20 Dec 2023 16:27:32 +0100 Message-ID: <20231220152732.2138260-6-hugues.fruchet@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231220152732.2138260-1-hugues.fruchet@foss.st.com> References: <20231220152732.2138260-1-hugues.fruchet@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.20.120] X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-20_09,2023-12-20_01,2023-05-22_02 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231220_072851_565033_DF6EB3A6 X-CRM114-Status: UNSURE ( 9.19 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Add VENC hardware video encoder support to STM32MP255. Signed-off-by: Hugues Fruchet --- arch/arm64/boot/dts/st/stm32mp251.dtsi | 6 ++++++ arch/arm64/boot/dts/st/stm32mp255.dtsi | 7 +++++++ 2 files changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi index 8fc7e9199499..5dd4f3580a60 100644 --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi @@ -58,6 +58,12 @@ ck_icn_p_vdec: ck-icn-p-vdec { compatible = "fixed-clock"; clock-frequency = <200000000>; }; + + ck_icn_p_venc: ck-icn-p-venc { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <200000000>; + }; }; firmware { diff --git a/arch/arm64/boot/dts/st/stm32mp255.dtsi b/arch/arm64/boot/dts/st/stm32mp255.dtsi index aea5096dac3c..17f197c5b22b 100644 --- a/arch/arm64/boot/dts/st/stm32mp255.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp255.dtsi @@ -14,6 +14,13 @@ vdec: vdec@480d0000 { interrupts = ; clocks = <&ck_icn_p_vdec>; }; + + venc: venc@480e0000 { + compatible = "st,stm32mp25-venc"; + reg = <0x480e0000 0x800>; + interrupts = ; + clocks = <&ck_icn_ls_mcu>; + }; }; }; };