| Message ID | 20240604163408.1863080-3-liujianfeng1994@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | media: rockchip: rga: Add rk3588 support | expand |
Hi Jianfeng, I've tested RGA2 now for a while on a RK3588 board and it works correctly. Of course it has to be updated and moved to probably rk3588-base.dtsi now. With this done: Tested-by: Tim Surber <me@timsurber.de> Best regards, Tim Surber On 04.06.24 18:34, Jianfeng Liu wrote: > RK3588 also features a RGA2 block. Add the necessary device tree > node. > > Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> > > --- > > Changes in v2: > - Sort node by bus-address based on next-20240604 > > arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > index 6ac5ac8b48a..beebc4dc0e7 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > @@ -1159,6 +1159,17 @@ power-domain@RK3588_PD_SDMMC { > }; > }; > > + rga: rga@fdb80000 { > + compatible = "rockchip,rk3588-rga", "rockchip,rk3288-rga"; > + reg = <0x0 0xfdb80000 0x0 0x180>; > + interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH 0>; > + clocks = <&cru ACLK_RGA2>, <&cru HCLK_RGA2>, <&cru CLK_RGA2_CORE>; > + clock-names = "aclk", "hclk", "sclk"; > + resets = <&cru SRST_RGA2_CORE>, <&cru SRST_A_RGA2>, <&cru SRST_H_RGA2>; > + reset-names = "core", "axi", "ahb"; > + power-domains = <&power RK3588_PD_VDPU>; > + }; > + > av1d: video-codec@fdc70000 { > compatible = "rockchip,rk3588-av1-vpu"; > reg = <0x0 0xfdc70000 0x0 0x800>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 6ac5ac8b48a..beebc4dc0e7 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -1159,6 +1159,17 @@ power-domain@RK3588_PD_SDMMC { }; }; + rga: rga@fdb80000 { + compatible = "rockchip,rk3588-rga", "rockchip,rk3288-rga"; + reg = <0x0 0xfdb80000 0x0 0x180>; + interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&cru ACLK_RGA2>, <&cru HCLK_RGA2>, <&cru CLK_RGA2_CORE>; + clock-names = "aclk", "hclk", "sclk"; + resets = <&cru SRST_RGA2_CORE>, <&cru SRST_A_RGA2>, <&cru SRST_H_RGA2>; + reset-names = "core", "axi", "ahb"; + power-domains = <&power RK3588_PD_VDPU>; + }; + av1d: video-codec@fdc70000 { compatible = "rockchip,rk3588-av1-vpu"; reg = <0x0 0xfdc70000 0x0 0x800>;
RK3588 also features a RGA2 block. Add the necessary device tree node. Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> --- Changes in v2: - Sort node by bus-address based on next-20240604 arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+)