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AJvYcCX0MPxMBXlO91mNc5pJrbHMopMHmVv5lHM2w+g5VIuHSQ709+q38EUY4f+IUwLRGvRHk+LVwjQzX5xZP60brBXAQd2y5r3cBNbnVTjQ69yms/AeM7olD6I11zfEd+if7KI8w1IZ87xMpfisgbXmWDfKSUnd/byick0= X-Gm-Message-State: AOJu0YyKLCZirducOXbMe7SkOA6SqfFG7QT4jOA7eKXOGcv5JV+bekzN U42JXoeRyrwokb36Snx5yHdX+ZG5XS0xC83nbKyv5EpkxKI9940= X-Google-Smtp-Source: AGHT+IE/9gjfgWZnYQXOAj5tp9SUA5Lk6QARVK16iFxrgqIbxjEEWBQNATeesl0pbTjRSU1L32AXIA== X-Received: by 2002:adf:fe0d:0:b0:35e:60e6:c8a8 with SMTP id ffacd0b85a97d-35e8405dd0emr2592276f8f.10.1717621251632; Wed, 05 Jun 2024 14:00:51 -0700 (PDT) Received: from U4.lan ([2a02:810b:f40:4600:5211:58fe:dfef:c48c]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-35dd04c0d77sm15955721f8f.5.2024.06.05.14.00.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Jun 2024 14:00:51 -0700 (PDT) From: Alex Bee To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: Michael Turquette , Stephen Boyd , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Alex Bee Subject: [PATCH v2 1/5 RESEND] clk: rockchip: rk3128: Drop CLK_NR_CLKS usage Date: Wed, 5 Jun 2024 23:00:45 +0200 Message-ID: <20240605210049.232284-2-knaerzche@gmail.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240605210049.232284-1-knaerzche@gmail.com> References: <20240605210049.232284-1-knaerzche@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240605_140053_984254_3185DE75 X-CRM114-Status: GOOD ( 12.01 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org In order to get rid of CLK_NR_CLKS and be able to drop it from the bindings, use rockchip_clk_find_max_clk_id helper to find the highest clock id. Signed-off-by: Alex Bee --- changes since v1: - new patch drivers/clk/rockchip/clk-rk3128.c | 20 ++++++++++++++++---- 1 file changed, 16 insertions(+), 4 deletions(-) diff --git a/drivers/clk/rockchip/clk-rk3128.c b/drivers/clk/rockchip/clk-rk3128.c index d076b7971f33..40e0e4556d59 100644 --- a/drivers/clk/rockchip/clk-rk3128.c +++ b/drivers/clk/rockchip/clk-rk3128.c @@ -569,18 +569,22 @@ static const char *const rk3128_critical_clocks[] __initconst = { "sclk_timer5", }; -static struct rockchip_clk_provider *__init rk3128_common_clk_init(struct device_node *np) +static struct rockchip_clk_provider *__init rk3128_common_clk_init(struct device_node *np, + unsigned long soc_nr_clks) { struct rockchip_clk_provider *ctx; + unsigned long common_nr_clks; void __iomem *reg_base; + common_nr_clks = rockchip_clk_find_max_clk_id(common_clk_branches, + ARRAY_SIZE(common_clk_branches)) + 1; reg_base = of_iomap(np, 0); if (!reg_base) { pr_err("%s: could not map cru region\n", __func__); return ERR_PTR(-ENOMEM); } - ctx = rockchip_clk_init(np, reg_base, CLK_NR_CLKS); + ctx = rockchip_clk_init(np, reg_base, max(common_nr_clks, soc_nr_clks)); if (IS_ERR(ctx)) { pr_err("%s: rockchip clk init failed\n", __func__); iounmap(reg_base); @@ -609,8 +613,12 @@ static struct rockchip_clk_provider *__init rk3128_common_clk_init(struct device static void __init rk3126_clk_init(struct device_node *np) { struct rockchip_clk_provider *ctx; + unsigned long soc_nr_clks; - ctx = rk3128_common_clk_init(np); + soc_nr_clks = rockchip_clk_find_max_clk_id(rk3126_clk_branches, + ARRAY_SIZE(rk3126_clk_branches)) + 1; + + ctx = rk3128_common_clk_init(np, soc_nr_clks); if (IS_ERR(ctx)) return; @@ -627,8 +635,12 @@ CLK_OF_DECLARE(rk3126_cru, "rockchip,rk3126-cru", rk3126_clk_init); static void __init rk3128_clk_init(struct device_node *np) { struct rockchip_clk_provider *ctx; + unsigned long soc_nr_clks; + + soc_nr_clks = rockchip_clk_find_max_clk_id(rk3128_clk_branches, + ARRAY_SIZE(rk3128_clk_branches)) + 1; - ctx = rk3128_common_clk_init(np); + ctx = rk3128_common_clk_init(np, soc_nr_clks); if (IS_ERR(ctx)) return;