diff mbox series

[v2,5/5] arm64: dts: rockchip: Add cpufreq support to Khadas Edge2

Message ID 20240617071112.3133101-6-jacobe.zang@wesion.com (mailing list archive)
State New
Headers show
Series arm64: dts: Add board support for Khadas Edge2 | expand

Commit Message

Jacobe Zang June 17, 2024, 7:11 a.m. UTC
This adjust CPU nodes on Khadas Edge2.

Signed-off-by: Jacobe Zang <jacobe.zang@wesion.com>
---
 .../arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

Comments

Heiko Stuebner June 17, 2024, 8:33 a.m. UTC | #1
Hi Jacobe Zang,

Am Montag, 17. Juni 2024, 09:11:12 CEST schrieb Jacobe Zang:
> This adjust CPU nodes on Khadas Edge2.
> 
> Signed-off-by: Jacobe Zang <jacobe.zang@wesion.com>
> ---
>  .../arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts | 12 ++++++++++--
>  1 file changed, 10 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
> index 7d7cc3e76838c..5fb15d3dc23e9 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
> @@ -160,34 +160,42 @@ vdd_3v3_sd: vdd-3v3-sd-regulator {
>  
>  &cpu_b0 {
>  	cpu-supply = <&vdd_cpu_big0_s0>;
> +	mem-supply = <&vdd_cpu_big0_mem_s0>;

as far as I remember there has not been any binding merged that declares
this supply. Thankfully following the double phandle below, the Edge2 is
designed to use the same regulator for the mem-supply, so special handling
isn't even needed.


Heiko


>  };
>  
>  &cpu_b1 {
>  	cpu-supply = <&vdd_cpu_big0_s0>;
> +	mem-supply = <&vdd_cpu_big0_mem_s0>;
>  };
>  
>  &cpu_b2 {
>  	cpu-supply = <&vdd_cpu_big1_s0>;
> +	mem-supply = <&vdd_cpu_big1_mem_s0>;
>  };
>  
>  &cpu_b3 {
>  	cpu-supply = <&vdd_cpu_big1_s0>;
> +	mem-supply = <&vdd_cpu_big1_mem_s0>;
>  };
>  
>  &cpu_l0 {
>  	cpu-supply = <&vdd_cpu_lit_s0>;
> +	mem-supply = <&vdd_cpu_lit_mem_s0>;
>  };
>  
>  &cpu_l1 {
>  	cpu-supply = <&vdd_cpu_lit_s0>;
> +	mem-supply = <&vdd_cpu_lit_mem_s0>;
>  };
>  
>  &cpu_l2 {
>  	cpu-supply = <&vdd_cpu_lit_s0>;
> +	mem-supply = <&vdd_cpu_lit_mem_s0>;
>  };
>  
>  &cpu_l3 {
>  	cpu-supply = <&vdd_cpu_lit_s0>;
> +	mem-supply = <&vdd_cpu_lit_mem_s0>;
>  };
>  
>  &combphy0_ps {
> @@ -208,7 +216,7 @@ &i2c0 {
>  	pinctrl-0 = <&i2c0m2_xfer>;
>  	status = "okay";
>  
> -	vdd_cpu_big0_s0: regulator@42 {
> +	vdd_cpu_big0_s0: vdd_cpu_big0_mem_s0: regulator@42 {
>  		compatible = "rockchip,rk8602";
>  		reg = <0x42>;
>  		fcs,suspend-voltage-selector = <1>;
> @@ -225,7 +233,7 @@ regulator-state-mem {
>  		};
>  	};
>  
> -	vdd_cpu_big1_s0: regulator@43 {
> +	vdd_cpu_big1_s0: vdd_cpu_big1_mem_s0: regulator@43 {
>  		compatible = "rockchip,rk8603", "rockchip,rk8602";
>  		reg = <0x43>;
>  		fcs,suspend-voltage-selector = <1>;
>
Alexey Charkov June 17, 2024, 9:09 a.m. UTC | #2
On 17/06/2024 11:33, Heiko Stübner wrote:
> Hi Jacobe Zang,
>
> Am Montag, 17. Juni 2024, 09:11:12 CEST schrieb Jacobe Zang:
>> This adjust CPU nodes on Khadas Edge2.
>>
>> Signed-off-by: Jacobe Zang <jacobe.zang@wesion.com>
>> ---
>>   .../arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts | 12 ++++++++++--
>>   1 file changed, 10 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
>> index 7d7cc3e76838c..5fb15d3dc23e9 100644
>> --- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
>> +++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
>> @@ -160,34 +160,42 @@ vdd_3v3_sd: vdd-3v3-sd-regulator {
>>   
>>   &cpu_b0 {
>>   	cpu-supply = <&vdd_cpu_big0_s0>;
>> +	mem-supply = <&vdd_cpu_big0_mem_s0>;
> as far as I remember there has not been any binding merged that declares
> this supply. Thankfully following the double phandle below, the Edge2 is
> designed to use the same regulator for the mem-supply, so special handling
> isn't even needed.

Indeed, currently there isn't any user in the mainline tree (neither 
bindings nor drivers) for this separate regulator. Mainline cpufreq-dt 
only expects a single regulator, and as Heiko pointed out Edge2 uses the 
same physical regulator to power both the CPU core and its SRAM, so 
adding a separate mem-supply here isn't helpful.

Best regards, Alexey
Jacobe Zang June 17, 2024, 9:41 a.m. UTC | #3
Thanks Heiko and Alexey, I will delete this patch in next version.

---
Best Regards
Jacobe
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
index 7d7cc3e76838c..5fb15d3dc23e9 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
@@ -160,34 +160,42 @@  vdd_3v3_sd: vdd-3v3-sd-regulator {
 
 &cpu_b0 {
 	cpu-supply = <&vdd_cpu_big0_s0>;
+	mem-supply = <&vdd_cpu_big0_mem_s0>;
 };
 
 &cpu_b1 {
 	cpu-supply = <&vdd_cpu_big0_s0>;
+	mem-supply = <&vdd_cpu_big0_mem_s0>;
 };
 
 &cpu_b2 {
 	cpu-supply = <&vdd_cpu_big1_s0>;
+	mem-supply = <&vdd_cpu_big1_mem_s0>;
 };
 
 &cpu_b3 {
 	cpu-supply = <&vdd_cpu_big1_s0>;
+	mem-supply = <&vdd_cpu_big1_mem_s0>;
 };
 
 &cpu_l0 {
 	cpu-supply = <&vdd_cpu_lit_s0>;
+	mem-supply = <&vdd_cpu_lit_mem_s0>;
 };
 
 &cpu_l1 {
 	cpu-supply = <&vdd_cpu_lit_s0>;
+	mem-supply = <&vdd_cpu_lit_mem_s0>;
 };
 
 &cpu_l2 {
 	cpu-supply = <&vdd_cpu_lit_s0>;
+	mem-supply = <&vdd_cpu_lit_mem_s0>;
 };
 
 &cpu_l3 {
 	cpu-supply = <&vdd_cpu_lit_s0>;
+	mem-supply = <&vdd_cpu_lit_mem_s0>;
 };
 
 &combphy0_ps {
@@ -208,7 +216,7 @@  &i2c0 {
 	pinctrl-0 = <&i2c0m2_xfer>;
 	status = "okay";
 
-	vdd_cpu_big0_s0: regulator@42 {
+	vdd_cpu_big0_s0: vdd_cpu_big0_mem_s0: regulator@42 {
 		compatible = "rockchip,rk8602";
 		reg = <0x42>;
 		fcs,suspend-voltage-selector = <1>;
@@ -225,7 +233,7 @@  regulator-state-mem {
 		};
 	};
 
-	vdd_cpu_big1_s0: regulator@43 {
+	vdd_cpu_big1_s0: vdd_cpu_big1_mem_s0: regulator@43 {
 		compatible = "rockchip,rk8603", "rockchip,rk8602";
 		reg = <0x43>;
 		fcs,suspend-voltage-selector = <1>;