From patchwork Fri Aug 2 15:31:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Detlev Casanova X-Patchwork-Id: 13751703 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 72583C3DA4A for ; Fri, 2 Aug 2024 15:36:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=MXDPOXxVlX8fJZN8Fanu1TxpH6iNZhHXyla3ZCd7OLw=; b=l5y9fLnHXLE4ys AedlSd+we+vUccWJySBh8aoAtXceM0QTy7yFLIyd3tUMiCTi57DxD7+9sdYK2smX65ixE6eJVtYcW uXkzPWVqRzSCD+bOHgrixb/Hb2azgt5Z4dNx2B94D8ZIJBOGCHrl1on3bxVG2G+r+m4MDJ0B/cirf COCQ8eIMxr9/8uY+uUc3r2iB4mHjhY/Ii6noGlpMqsflt7HIbtMKFDh7+kVlkXJPEofcO7be88y1X Ydsuvxwa2cP+++QgQPiXiJOVqTPIgR+IVjBAYqJbAZ0iOFKd7Y4yYv+R0PHozQ0C4ojdcas6ftJj2 JTrlL2wxIXEqahEOED3A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sZuKa-00000009Is7-3mBy; Fri, 02 Aug 2024 15:36:36 +0000 Received: from madrid.collaboradmins.com ([2a00:1098:ed:100::25]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sZuJC-00000009IU8-1uq8; Fri, 02 Aug 2024 15:35:11 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1722612909; bh=6jXRBP+uzUiPE83cF/CLBHqxDVEBgCZETPVHDDmT6Vo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NA+GzsS7EkJZFPoDTZSueWdyLWxvbfYRwjPzfR31XwOSViWFa+ZrxLHcePl2b7x8w Sh4gi+YgunY3lEnfKyLRyTHaGSgRwVcUKE00tRTNFc4OYuQP0R7iIL4QuVbAV5VGtg zOGbO3BiYyFgncRPbHAiABcglhv0jjwePaR76aAiiZeKzxmOGTsU07gtGSmE1xe1I9 S8mUKFqT2iIShwHl+/UKAQxs+KCG8yeF7+xT5ZAP5XYp5h9yHepMTMHYhgXh2u5v3e 5ozVWba7GT4GRie7c/akqbFFdnakD/LsNJBSv9JLvj2/qhhJTlcOT+gxUwIXOvXTbb s9oG/5fJYkl1A== Received: from trenzalore.hitronhub.home (cola.collaboradmins.com [195.201.22.229]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: detlev) by madrid.collaboradmins.com (Postfix) with ESMTPSA id 31AC7378221A; Fri, 2 Aug 2024 15:35:07 +0000 (UTC) From: Detlev Casanova To: linux-kernel@vger.kernel.org Cc: Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Jaehoon Chung , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, Shawn Lin , Detlev Casanova Subject: [PATCH 2/3] mmc: dw_mmc-rockchip: Add v2 tuning support Date: Fri, 2 Aug 2024 11:31:28 -0400 Message-ID: <20240802153609.296197-3-detlev.casanova@collabora.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240802153609.296197-1-detlev.casanova@collabora.com> References: <20240802153609.296197-1-detlev.casanova@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240802_083510_652718_B1734B58 X-CRM114-Status: GOOD ( 19.13 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org From: Shawn Lin v2 tuning will inherit pre-stage loader's phase settings for the first time, and do re-tune if necessary. Re-tune will still try the rough degrees, for instance, 90, 180, 270, 360 but continue to do the fine tuning if sample window isn't good enough. Signed-off-by: Shawn Lin Signed-off-by: Detlev Casanova --- drivers/mmc/host/dw_mmc-rockchip.c | 48 ++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c index b07190ba4b7ac..c47b93d99a1b3 100644 --- a/drivers/mmc/host/dw_mmc-rockchip.c +++ b/drivers/mmc/host/dw_mmc-rockchip.c @@ -24,6 +24,8 @@ struct dw_mci_rockchip_priv_data { struct clk *sample_clk; int default_sample_phase; int num_phases; + bool use_v2_tuning; + int last_degree; }; static void dw_mci_rk3288_set_ios(struct dw_mci *host, struct mmc_ios *ios) @@ -134,6 +136,42 @@ static void dw_mci_rk3288_set_ios(struct dw_mci *host, struct mmc_ios *ios) #define TUNING_ITERATION_TO_PHASE(i, num_phases) \ (DIV_ROUND_UP((i) * 360, num_phases)) +static int dw_mci_v2_execute_tuning(struct dw_mci_slot *slot, u32 opcode) +{ + struct dw_mci *host = slot->host; + struct dw_mci_rockchip_priv_data *priv = host->priv; + struct mmc_host *mmc = slot->mmc; + u32 degrees[4] = {90, 180, 270, 360}; + int i; + static bool inherit = true; + + if (inherit) { + inherit = false; + i = clk_get_phase(priv->sample_clk) / 90 - 1; + goto done; + } + + /* v2 only support 4 degrees in theory */ + for (i = 0; i < ARRAY_SIZE(degrees); i++) { + if (degrees[i] == priv->last_degree) + continue; + + clk_set_phase(priv->sample_clk, degrees[i]); + if (!mmc_send_tuning(mmc, opcode, NULL)) + break; + } + + if (i == ARRAY_SIZE(degrees)) { + dev_warn(host->dev, "All phases bad!"); + return -EIO; + } + +done: + dev_info(host->dev, "Successfully tuned phase to %d\n", degrees[i]); + priv->last_degree = degrees[i]; + return 0; +} + static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) { struct dw_mci *host = slot->host; @@ -157,6 +195,13 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) return -EIO; } + if (priv->use_v2_tuning) { + ret = dw_mci_v2_execute_tuning(slot, opcode); + if (!ret) + return 0; + /* Otherwise we continue using fine tuning */ + } + ranges = kmalloc_array(priv->num_phases / 2 + 1, sizeof(*ranges), GFP_KERNEL); if (!ranges) @@ -277,6 +322,9 @@ static int dw_mci_rk3288_parse_dt(struct dw_mci *host) &priv->default_sample_phase)) priv->default_sample_phase = 0; + if (of_property_read_bool(np, "rockchip,use-v2-tuning")) + priv->use_v2_tuning = true; + priv->drv_clk = devm_clk_get(host->dev, "ciu-drive"); if (IS_ERR(priv->drv_clk)) dev_dbg(host->dev, "ciu-drive not available\n");