| Message ID | 20240820-friendlyelec-nanopc-t6-lts-v1-1-da1273c3e08e@juszkiewicz.com.pl (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | arm64: dts: rockchip: Add FriendlyELEC NanoPC-T6 LTS | expand |
Hi Marcin, Am Dienstag, 20. August 2024, 16:42:08 CEST schrieb Marcin Juszkiewicz: > From: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> > > FriendlyELEC introduced new version of NanoPC-T6 SBC. > > MiniPCIe slot got removed and USB 2.0 configuration has changed. > There are two external accessible ports and two ports on internal > header. > > There is on-board USB hub which provides: > - one external connector (bottom one) > - two internal ports on pin header > - m.2 E port > > Top USB 2.0 connector comes directly from SoC. > > Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> > --- > FriendlyELEC introduced new version of NanoPC-T6 SBC. > > MiniPCIe slot got removed and USB 2.0 configuration has changed. There > are two external accessible ports and two ports on internal header. > > There is on-board USB hub which provides: > - one external connector (bottom one) > - two internal ports on pin header > - m.2 E port > > Top USB 2.0 connector comes directly from SoC. > > I am not sure should it be separate source file or should it be > integrated into rk3588-nanopc-t6.dts one. The differences are small: > > - no vdd_4g_3v3 regulator on LTS > - no vcc5v0_host_20 regulator on non-LTS > - LTS one has more complex USB 2.0 setup > > When I merge LTS differences into NanoPC-T6 dts file then my > NanoPC-T6 LTS board boots fine. But I have no way to test on non-LTS > one. > --- > arch/arm64/boot/dts/rockchip/Makefile | 1 + > .../boot/dts/rockchip/rk3588-nanopc-t6-lts.dts | 60 ++++++++++++++++++++++ missing dt-binding addition (in a separate patch) to Documentation/devicetree/bindings/arm/rockchip.yaml Please group with the other nanopc-t6, look at the other FriendElec entries for inspiration. > 2 files changed, 61 insertions(+) > > diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile > index fda1b980eb4b..0f982c741243 100644 > --- a/arch/arm64/boot/dts/rockchip/Makefile > +++ b/arch/arm64/boot/dts/rockchip/Makefile > @@ -128,6 +128,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-v10.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-friendlyelec-cm3588-nas.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-jaguar.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nanopc-t6.dtb > +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nanopc-t6-lts.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-ok3588-c.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-orangepi-5-plus.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-quartzpro64.dtb > diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6-lts.dts b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6-lts.dts > new file mode 100644 > index 000000000000..13f273cfe94f > --- /dev/null > +++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6-lts.dts > @@ -0,0 +1,60 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (c) 2021 Rockchip Electronics Co., Ltd. > + * Copyright (c) 2023 Thomas McKahan > + * Copyright (c) 2024 Marcin Juszkiewicz > + * > + */ > + > +/dts-v1/; > + > +#include "rk3588-nanopc-t6.dts" > + > +/ { > + model = "FriendlyElec NanoPC-T6 LTS"; > + compatible = "friendlyarm,nanopc-t6-lts", "rockchip,rk3588"; > + > + vcc5v0_host_20: vcc5v0-host-regulator { most recent naming suggestion is would be regulator-foo. Also please double check with the schematics what's the actual name, your phandle doesn't match the regulator-name below. > + compatible = "regulator-fixed"; > + enable-active-high; > + gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; > + pinctrl-0 = <&usb20_host_pwren>; > + pinctrl-names = "default"; > + regulator-always-on; > + regulator-boot-on; > + regulator-max-microvolt = <5000000>; > + regulator-min-microvolt = <5000000>; > + regulator-name = "vcc5v0_host"; > + vin-supply = <&vcc5v0_sys>; > + }; > +}; Cheers Heiko
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index fda1b980eb4b..0f982c741243 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -128,6 +128,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-v10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-friendlyelec-cm3588-nas.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-jaguar.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nanopc-t6.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nanopc-t6-lts.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-ok3588-c.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-orangepi-5-plus.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-quartzpro64.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6-lts.dts b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6-lts.dts new file mode 100644 index 000000000000..13f273cfe94f --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6-lts.dts @@ -0,0 +1,60 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2021 Rockchip Electronics Co., Ltd. + * Copyright (c) 2023 Thomas McKahan + * Copyright (c) 2024 Marcin Juszkiewicz + * + */ + +/dts-v1/; + +#include "rk3588-nanopc-t6.dts" + +/ { + model = "FriendlyElec NanoPC-T6 LTS"; + compatible = "friendlyarm,nanopc-t6-lts", "rockchip,rk3588"; + + vcc5v0_host_20: vcc5v0-host-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&usb20_host_pwren>; + pinctrl-names = "default"; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + regulator-name = "vcc5v0_host"; + vin-supply = <&vcc5v0_sys>; + }; +}; + +&pinctrl { + usb { + usb20_host_pwren: vcc5v0-host-en { + rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&u2phy1 { + status = "okay"; +}; + +&u2phy1_otg { + status = "okay"; +}; + +&u2phy2_host { + phy-supply = <&vcc5v0_host_20>; + status = "okay"; +}; + +&usbdp_phy1 { + status = "okay"; +}; + +&usb_host1_xhci { + dr_mode = "host"; + status = "okay"; +};