From patchwork Fri Aug 30 21:55:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 13785638 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3497ECA101A for ; Fri, 30 Aug 2024 21:58:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ZOgV/3YTou/miXBLJltrkrKgBpNKB4pi23SkfH79BU4=; b=r++oIkDjYBStdU FJdc6hitod4+T9SKYlGTqu5LuUZWyc6/gTzwCa+SXbWMrjkwDJ0MjgBy2D0go/VlKXzmjcS1LOETH X0mgxtyupfExm/CW2FBOnNg3oQHchjMxNSes/2H+N/xnHzpDsz5QMP9GLfBDvyKOx7cme1FGL2ohw XF3n15A2G/vnSunrTZZFh4bQnhjCsBjGBIiMnow2Wo9Uau3CJR53DpMlXexw+c2CW0LeqYAy6k94h D1/4JHDsN8m5TdxdYgLSZDW+xd4KfrwxTQJpZ6ge+4eXoz6t1biRdC/EFQyPF+7Clb+7Qqwg7l3CM wdl0vxqj4sfWFTLlJu1Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sk9dv-00000007nZe-2ST2; Fri, 30 Aug 2024 21:58:55 +0000 Received: from bali.collaboradmins.com ([2a01:4f8:201:9162::2]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sk9bF-00000007mqS-2ezL; Fri, 30 Aug 2024 21:56:11 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1725054968; bh=4SD7PlOW4FqdGWC0xTuxcDFJMwhJMfAeNYygezfaDTM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=J4ZInEQ886jbNwjS1TbUZkVoOSBFTw5dkj4DZokv1ax159WAIqJQplownaahghcW0 z37WM/h6UVKS4UsRHmUiMNRkyvSfNVjwLkbFUMl239Y9J1srnELIKA0SuyKfy2wQqk q39uv67L2Bu+JK2JCs32TMjxEZ7oOuhA7UBOTMihLYbWYR2kgX0U6JYqksrEt5rWVP am1DRnv6PuVFSbo+WRH7Fte2bMIGPMPcsCL6eJZE/AvcitJZR9C0nmJoB5j1kfEV3W i9YKBB1M2n45ihZ08Wm2RA5Z3wlYv9s+ltCwhcmVxMutJ1mcbGNyEyiYLTf93vT5a7 4mPca0Opyd1Jw== Received: from localhost (unknown [188.27.55.48]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by bali.collaboradmins.com (Postfix) with ESMTPSA id D856317E14ED; Fri, 30 Aug 2024 23:56:07 +0200 (CEST) From: Cristian Ciocaltea Date: Sat, 31 Aug 2024 00:55:31 +0300 Subject: [PATCH v5 3/4] dt-bindings: display: rockchip: Add schema for RK3588 HDMI TX Controller MIME-Version: 1.0 Message-Id: <20240831-b4-rk3588-bridge-upstream-v5-3-9503bece0136@collabora.com> References: <20240831-b4-rk3588-bridge-upstream-v5-0-9503bece0136@collabora.com> In-Reply-To: <20240831-b4-rk3588-bridge-upstream-v5-0-9503bece0136@collabora.com> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Sandy Huang , =?utf-8?q?Heiko_St=C3=BCbner?= , Andy Yan , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mark Yao , Sascha Hauer Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, kernel@collabora.com, Alexandre ARNOUD , Luis de Arquer X-Mailer: b4 0.14.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240830_145610_110794_EE518E94 X-CRM114-Status: GOOD ( 12.47 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Rockchip RK3588 SoC integrates the Synopsys DesignWare HDMI 2.1 Quad-Pixel (QP) TX controller IP. Since this is a new IP block, quite different from those used in the previous generations of Rockchip SoCs, add a dedicated binding file. Signed-off-by: Cristian Ciocaltea --- .../rockchip/rockchip,rk3588-dw-hdmi-qp.yaml | 166 +++++++++++++++++++++ 1 file changed, 166 insertions(+) diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3588-dw-hdmi-qp.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3588-dw-hdmi-qp.yaml new file mode 100644 index 000000000000..d2919ff6aa23 --- /dev/null +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3588-dw-hdmi-qp.yaml @@ -0,0 +1,166 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/rockchip/rockchip,rk3588-dw-hdmi-qp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip DW HDMI QP TX Encoder + +maintainers: + - Cristian Ciocaltea + +description: + Rockchip RK3588 SoC integrates the Synopsys DesignWare HDMI QP TX controller + IP and a HDMI/eDP TX Combo PHY based on a Samsung IP block. + +allOf: + - $ref: /schemas/display/bridge/synopsys,dw-hdmi-qp.yaml# + - $ref: /schemas/sound/dai-common.yaml# + +properties: + compatible: + enum: + - rockchip,rk3588-dw-hdmi-qp + + clocks: + items: + - {} + - {} + - {} + - {} + - description: TMDS/FRL link clock + - description: Video datapath clock + + clock-names: + items: + - {} + - {} + - {} + - {} + - enum: [hdp, hclk_vo1] + - const: hclk_vo1 + + interrupts: + items: + - {} + - {} + - {} + - {} + - description: HPD interrupt + + interrupt-names: + items: + - {} + - {} + - {} + - {} + - const: hpd + + phys: + maxItems: 1 + description: The HDMI/eDP PHY. + + phy-names: + const: hdmi + + power-domains: + maxItems: 1 + + resets: + minItems: 2 + maxItems: 2 + + reset-names: + items: + - const: ref + - const: hdp + + "#sound-dai-cells": + const: 0 + + rockchip,grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Some HDMI QP related data is accessed through SYS GRF regs. + + rockchip,vo-grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Additional HDMI QP related data is accessed through VO GRF regs. + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + - interrupt-names + - phys + - phy-names + - ports + - resets + - reset-names + - rockchip,grf + - rockchip,vo-grf + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + hdmi@fde80000 { + compatible = "rockchip,rk3588-dw-hdmi-qp"; + reg = <0x0 0xfde80000 0x0 0x20000>; + clocks = <&cru PCLK_HDMITX0>, + <&cru CLK_HDMITX0_EARC>, + <&cru CLK_HDMITX0_REF>, + <&cru MCLK_I2S5_8CH_TX>, + <&cru CLK_HDMIHDP0>, + <&cru HCLK_VO1>; + clock-names = "pclk", "earc", "ref", "aud", "hdp", "hclk_vo1"; + interrupts = , + , + , + , + ; + interrupt-names = "avp", "cec", "earc", "main", "hpd"; + phys = <&hdptxphy_hdmi0>; + phy-names = "hdmi"; + power-domains = <&power RK3588_PD_VO1>; + resets = <&cru SRST_HDMITX0_REF>, <&cru SRST_HDMIHDP0>; + reset-names = "ref", "hdp"; + rockchip,grf = <&sys_grf>; + rockchip,vo-grf = <&vo1_grf>; + #sound-dai-cells = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + hdmi0_in_vp0: endpoint { + remote-endpoint = <&vp0_out_hdmi0>; + }; + }; + + port@1 { + reg = <1>; + + hdmi0_out_con0: endpoint { + remote-endpoint = <&hdmi_con0_in>; + }; + }; + }; + }; + };