| Message ID | 20240930022837.885-1-naoki@radxa.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | arm64: dts: rockchip: fix pinctrl for pcie2x1l2 for Radxa ROCK 5A | expand |
Hi, Am Montag, 30. September 2024, 04:28:37 CEST schrieb FUKAUMI Naoki: > for pcie2x1l2, only pcie20x1_2_perstn_m0 is required. > fix pinctrl definitions for pcie2x1l2. I guess the other pins are used for something different? Not criticizing the change itself, but for a "fixes", I do expect some explanation, why the previous setting is _wrong_ . Thanks Heiko > Fixes: b728d4c51f0c ("arm64: dts: rockchip: enable PCIe on M.2 E key for Radxa ROCK 5A") > Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> > --- > arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts | 6 +++++- > 1 file changed, 5 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts > index 435355433bbd..1d7adece42a5 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts > +++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts > @@ -310,7 +310,7 @@ rgmii_phy1: ethernet-phy@1 { > }; > > &pcie2x1l2 { > - pinctrl-0 = <&pcie20x1m0_pins>; > + pinctrl-0 = <&pcie20x1_2_perstn_m0>; > pinctrl-names = "default"; > reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>; > vpcie3v3-supply = <&vcc3v3_wf>; > @@ -325,6 +325,10 @@ io_led: io-led { > }; > > pcie { > + pcie20x1_2_perstn_m0: pcie20x1-2-perstn-m0 { > + rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + > pow_en: pow-en { > rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; > }; >
hi, On 9/30/24 16:54, Heiko Stübner wrote: > Hi, > > Am Montag, 30. September 2024, 04:28:37 CEST schrieb FUKAUMI Naoki: >> for pcie2x1l2, only pcie20x1_2_perstn_m0 is required. >> fix pinctrl definitions for pcie2x1l2. > > I guess the other pins are used for something different? > > Not criticizing the change itself, but for a "fixes", I do expect some > explanation, why the previous setting is _wrong_ . sorry, for kernel, it shouldn't make any problem. this patch just "change" (minimize) pinctrl definitions. Fixes tag may not be needed. (for u-boot, pcie20x1_2_perstn_m0 pin function needs to be GPIO to avoid freeze.) Best regards, -- FUKAUMI Naoki Radxa Computer (Shenzhen) Co., Ltd. > Thanks > Heiko > >> Fixes: b728d4c51f0c ("arm64: dts: rockchip: enable PCIe on M.2 E key for Radxa ROCK 5A") >> Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> >> --- >> arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts | 6 +++++- >> 1 file changed, 5 insertions(+), 1 deletion(-) >> >> diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts >> index 435355433bbd..1d7adece42a5 100644 >> --- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts >> +++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts >> @@ -310,7 +310,7 @@ rgmii_phy1: ethernet-phy@1 { >> }; >> >> &pcie2x1l2 { >> - pinctrl-0 = <&pcie20x1m0_pins>; >> + pinctrl-0 = <&pcie20x1_2_perstn_m0>; >> pinctrl-names = "default"; >> reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>; >> vpcie3v3-supply = <&vcc3v3_wf>; >> @@ -325,6 +325,10 @@ io_led: io-led { >> }; >> >> pcie { >> + pcie20x1_2_perstn_m0: pcie20x1-2-perstn-m0 { >> + rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; >> + }; >> + >> pow_en: pow-en { >> rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; >> }; >> > > > > >
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts index 435355433bbd..1d7adece42a5 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts @@ -310,7 +310,7 @@ rgmii_phy1: ethernet-phy@1 { }; &pcie2x1l2 { - pinctrl-0 = <&pcie20x1m0_pins>; + pinctrl-0 = <&pcie20x1_2_perstn_m0>; pinctrl-names = "default"; reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>; vpcie3v3-supply = <&vcc3v3_wf>; @@ -325,6 +325,10 @@ io_led: io-led { }; pcie { + pcie20x1_2_perstn_m0: pcie20x1-2-perstn-m0 { + rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + pow_en: pow-en { rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; };
for pcie2x1l2, only pcie20x1_2_perstn_m0 is required. fix pinctrl definitions for pcie2x1l2. Fixes: b728d4c51f0c ("arm64: dts: rockchip: enable PCIe on M.2 E key for Radxa ROCK 5A") Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> --- arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-)