From patchwork Mon Sep 30 21:06:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Edwards X-Patchwork-Id: 13817096 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E28C8CEB2C9 for ; Mon, 30 Sep 2024 21:13:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; 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Future work will be needed on USB0: it is not USB3-capable, so the USB0 controller needs to be told that there is no USB3 port. Per Jonas's suggestion, the USBDP0 node is given a `rockchip,dp-lane-mux` property that tells the USBDP driver that USBDP0 is not involved in USB so that it can make the necessary configuration changes in hardware. Technically, this is USB *controller* configuration, not *PHY* configuration, so the underlying code may be moved in the future to the USB controller driver instead, freeing up the (software) dependency on USBDP0. A TODO comment is added to explain this. Signed-off-by: Sam Edwards Suggested-by: Jonas Karlman --- Happy Monday folks, This is an updated version of one patch broken out from my previous series [1] that enables USB on the Turing RK1 SoM. Changes v1->v2: - `rockchip,dp-lane-mux` added to tell USBDP0 explicitly that it is not involved in USB (thanks Jonas) - Comment updated to more accurately reflect the situation, and to use one- not two-space-per-sentence style. Kind regards, Sam [1]: https://lore.kernel.org/lkml/20240912025034.180233-1-CFSworks@gmail.com/T/ --- .../boot/dts/rockchip/rk3588-turing-rk1.dtsi | 65 +++++++++++++++++++ 1 file changed, 65 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi index 0c4d809a860e..cdc525a8b157 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi @@ -683,3 +683,68 @@ &uart9 { pinctrl-0 = <&uart9m0_xfer>; status = "okay"; }; + +/* USB 0: USB 2.0 only, OTG-capable */ +&u2phy0 { + status = "okay"; +}; + +&u2phy0_otg { + status = "okay"; +}; + +&usbdp_phy0 { + /* + * TODO: On the RK1, USBDP0 drives the DisplayPort pins and is not + * involved in this USB2-only bus. The bus controller (below) needs to + * know that it doesn't have a USB3 port so it can ignore any + * USB3-related signals. This is handled in hardware by updating the + * GRFs corresponding to that bus controller. Alas, Linux currently + * puts the code to do that in the USBDP driver, so USBDP0 must be + * enabled for now. + */ + status = "okay"; + rockchip,dp-lane-mux = <0 1 2 3>; /* "No USB lanes" */ +}; + +&usb_host0_xhci { + extcon = <&u2phy0>; + maximum-speed = "high-speed"; + status = "okay"; +}; + +/* USB 1: USB 3.0, host only */ +&u2phy1 { + status = "okay"; +}; + +&u2phy1_otg { + status = "okay"; +}; + +&usbdp_phy1 { + status = "okay"; +}; + +&usb_host1_xhci { + extcon = <&u2phy1>; + dr_mode = "host"; + status = "okay"; +}; + +/* USB 2: USB 2.0, host only */ +&u2phy2 { + status = "okay"; +}; + +&u2phy2_host { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +};