| Message ID | 20241224093920.3816071-2-kever.yang@rock-chips.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | [v2,1/2] dt-bindings: power: add power binding header for RK3562 SoC | expand |
On Tue, 24 Dec 2024 at 10:39, Kever Yang <kever.yang@rock-chips.com> wrote: > > This driver is modified to support RK3562 SoC. > Add support to ungate clk. > Add support to shut down memory for rk3562. > > Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com> > Signed-off-by: Kever Yang <kever.yang@rock-chips.com> > --- > > Changes in v2: > - update the header after rename > > drivers/pmdomain/rockchip/pm-domains.c | 48 +++++++++++++++++++++++++- > 1 file changed, 47 insertions(+), 1 deletion(-) > > diff --git a/drivers/pmdomain/rockchip/pm-domains.c b/drivers/pmdomain/rockchip/pm-domains.c > index cb0f93800138..d05ec0a009a0 100644 > --- a/drivers/pmdomain/rockchip/pm-domains.c > +++ b/drivers/pmdomain/rockchip/pm-domains.c > @@ -2,7 +2,7 @@ > /* > * Rockchip Generic power domain support. > * > - * Copyright (c) 2015 ROCKCHIP, Co. Ltd. > + * Copyright (c) 2015 Rockchip Electronics Co., Ltd. > */ > > #include <linux/io.h> > @@ -32,6 +32,7 @@ > #include <dt-bindings/power/rk3366-power.h> > #include <dt-bindings/power/rk3368-power.h> > #include <dt-bindings/power/rk3399-power.h> > +#include <dt-bindings/power/rockchip,rk3562-power.h> > #include <dt-bindings/power/rk3568-power.h> > #include <dt-bindings/power/rockchip,rk3576-power.h> > #include <dt-bindings/power/rk3588-power.h> > @@ -129,6 +130,20 @@ struct rockchip_pmu { > .active_wakeup = wakeup, \ > } > > +#define DOMAIN_M_G_SD(_name, pwr, status, req, idle, ack, g_mask, mem, wakeup, keepon) \ > +{ \ > + .name = _name, \ > + .pwr_w_mask = (pwr) << 16, \ > + .pwr_mask = (pwr), \ > + .status_mask = (status), \ > + .req_w_mask = (req) << 16, \ > + .req_mask = (req), \ > + .idle_mask = (idle), \ > + .ack_mask = (ack), \ > + .clk_ungate_mask = (g_mask), \ > + .active_wakeup = wakeup, \ > +} > + > #define DOMAIN_M_O_R(_name, p_offset, pwr, status, m_offset, m_status, r_status, r_offset, req, idle, ack, wakeup) \ > { \ > .name = _name, \ > @@ -194,6 +209,9 @@ struct rockchip_pmu { > #define DOMAIN_RK3399(name, pwr, status, req, wakeup) \ > DOMAIN(name, pwr, status, req, req, req, wakeup) > > +#define DOMAIN_RK3562(name, pwr, req, g_mask, mem, wakeup) \ > + DOMAIN_M_G_SD(name, pwr, pwr, req, req, req, g_mask, mem, wakeup, false) > + > #define DOMAIN_RK3568(name, pwr, req, wakeup) \ > DOMAIN_M(name, pwr, pwr, req, req, req, wakeup) > > @@ -1130,6 +1148,18 @@ static const struct rockchip_domain_info rk3399_pm_domains[] = { > [RK3399_PD_SDIOAUDIO] = DOMAIN_RK3399("sdioaudio", BIT(31), BIT(31), BIT(29), true), > }; > > +static const struct rockchip_domain_info rk3562_pm_domains[] = { > + /* name pwr req g_mask mem wakeup */ > + [RK3562_PD_GPU] = DOMAIN_RK3562("gpu", BIT(0), BIT(1), BIT(1), 0, false), > + [RK3562_PD_NPU] = DOMAIN_RK3562("npu", BIT(1), BIT(2), BIT(2), 0, false), > + [RK3562_PD_VDPU] = DOMAIN_RK3562("vdpu", BIT(2), BIT(6), BIT(6), 0, false), > + [RK3562_PD_VEPU] = DOMAIN_RK3562("vepu", BIT(3), BIT(7), BIT(7) | BIT(3), 0, false), > + [RK3562_PD_RGA] = DOMAIN_RK3562("rga", BIT(4), BIT(5), BIT(5) | BIT(4), 0, false), > + [RK3562_PD_VI] = DOMAIN_RK3562("vi", BIT(5), BIT(3), BIT(3), 0, false), > + [RK3562_PD_VO] = DOMAIN_RK3562("vo", BIT(6), BIT(4), BIT(4), 16, false), > + [RK3562_PD_PHP] = DOMAIN_RK3562("php", BIT(7), BIT(8), BIT(8), 0, false), > +}; > + > static const struct rockchip_domain_info rk3568_pm_domains[] = { > [RK3568_PD_NPU] = DOMAIN_RK3568("npu", BIT(1), BIT(2), false), > [RK3568_PD_GPU] = DOMAIN_RK3568("gpu", BIT(0), BIT(1), false), > @@ -1331,6 +1361,18 @@ static const struct rockchip_pmu_info rk3399_pmu = { > .domain_info = rk3399_pm_domains, > }; > > +static const struct rockchip_pmu_info rk3562_pmu = { > + .pwr_offset = 0x210, > + .status_offset = 0x230, > + .req_offset = 0x110, > + .idle_offset = 0x128, > + .ack_offset = 0x120, > + .clk_ungate_offset = 0x140, > + > + .num_domains = ARRAY_SIZE(rk3562_pm_domains), > + .domain_info = rk3562_pm_domains, > +}; > + > static const struct rockchip_pmu_info rk3568_pmu = { > .pwr_offset = 0xa0, > .status_offset = 0x98, > @@ -1429,6 +1471,10 @@ static const struct of_device_id rockchip_pm_domain_dt_match[] = { > .compatible = "rockchip,rk3399-power-controller", > .data = (void *)&rk3399_pmu, > }, > + { > + .compatible = "rockchip,rk3562-power-controller", I couldn't find the corresponding DT patch where this compatible is being documented. Can you please re-send and keep me posted for both the DT and pmdomain patch? > + .data = (void *)&rk3562_pmu, > + }, > { > .compatible = "rockchip,rk3568-power-controller", > .data = (void *)&rk3568_pmu, > -- > 2.25.1 > Kind regards Uffe
On 16/01/2025 15:46, Ulf Hansson wrote: >> static const struct rockchip_pmu_info rk3568_pmu = { >> .pwr_offset = 0xa0, >> .status_offset = 0x98, >> @@ -1429,6 +1471,10 @@ static const struct of_device_id rockchip_pm_domain_dt_match[] = { >> .compatible = "rockchip,rk3399-power-controller", >> .data = (void *)&rk3399_pmu, >> }, >> + { >> + .compatible = "rockchip,rk3562-power-controller", > > I couldn't find the corresponding DT patch where this compatible is > being documented. Can you please re-send and keep me posted for both > the DT and pmdomain patch? I already commented on this on 1st patch - the split of original patchset is entirely broken and actual binding is missing. Or not missing but sent to entirely different folks in different thread... Best regards, Krzysztof
diff --git a/drivers/pmdomain/rockchip/pm-domains.c b/drivers/pmdomain/rockchip/pm-domains.c index cb0f93800138..d05ec0a009a0 100644 --- a/drivers/pmdomain/rockchip/pm-domains.c +++ b/drivers/pmdomain/rockchip/pm-domains.c @@ -2,7 +2,7 @@ /* * Rockchip Generic power domain support. * - * Copyright (c) 2015 ROCKCHIP, Co. Ltd. + * Copyright (c) 2015 Rockchip Electronics Co., Ltd. */ #include <linux/io.h> @@ -32,6 +32,7 @@ #include <dt-bindings/power/rk3366-power.h> #include <dt-bindings/power/rk3368-power.h> #include <dt-bindings/power/rk3399-power.h> +#include <dt-bindings/power/rockchip,rk3562-power.h> #include <dt-bindings/power/rk3568-power.h> #include <dt-bindings/power/rockchip,rk3576-power.h> #include <dt-bindings/power/rk3588-power.h> @@ -129,6 +130,20 @@ struct rockchip_pmu { .active_wakeup = wakeup, \ } +#define DOMAIN_M_G_SD(_name, pwr, status, req, idle, ack, g_mask, mem, wakeup, keepon) \ +{ \ + .name = _name, \ + .pwr_w_mask = (pwr) << 16, \ + .pwr_mask = (pwr), \ + .status_mask = (status), \ + .req_w_mask = (req) << 16, \ + .req_mask = (req), \ + .idle_mask = (idle), \ + .ack_mask = (ack), \ + .clk_ungate_mask = (g_mask), \ + .active_wakeup = wakeup, \ +} + #define DOMAIN_M_O_R(_name, p_offset, pwr, status, m_offset, m_status, r_status, r_offset, req, idle, ack, wakeup) \ { \ .name = _name, \ @@ -194,6 +209,9 @@ struct rockchip_pmu { #define DOMAIN_RK3399(name, pwr, status, req, wakeup) \ DOMAIN(name, pwr, status, req, req, req, wakeup) +#define DOMAIN_RK3562(name, pwr, req, g_mask, mem, wakeup) \ + DOMAIN_M_G_SD(name, pwr, pwr, req, req, req, g_mask, mem, wakeup, false) + #define DOMAIN_RK3568(name, pwr, req, wakeup) \ DOMAIN_M(name, pwr, pwr, req, req, req, wakeup) @@ -1130,6 +1148,18 @@ static const struct rockchip_domain_info rk3399_pm_domains[] = { [RK3399_PD_SDIOAUDIO] = DOMAIN_RK3399("sdioaudio", BIT(31), BIT(31), BIT(29), true), }; +static const struct rockchip_domain_info rk3562_pm_domains[] = { + /* name pwr req g_mask mem wakeup */ + [RK3562_PD_GPU] = DOMAIN_RK3562("gpu", BIT(0), BIT(1), BIT(1), 0, false), + [RK3562_PD_NPU] = DOMAIN_RK3562("npu", BIT(1), BIT(2), BIT(2), 0, false), + [RK3562_PD_VDPU] = DOMAIN_RK3562("vdpu", BIT(2), BIT(6), BIT(6), 0, false), + [RK3562_PD_VEPU] = DOMAIN_RK3562("vepu", BIT(3), BIT(7), BIT(7) | BIT(3), 0, false), + [RK3562_PD_RGA] = DOMAIN_RK3562("rga", BIT(4), BIT(5), BIT(5) | BIT(4), 0, false), + [RK3562_PD_VI] = DOMAIN_RK3562("vi", BIT(5), BIT(3), BIT(3), 0, false), + [RK3562_PD_VO] = DOMAIN_RK3562("vo", BIT(6), BIT(4), BIT(4), 16, false), + [RK3562_PD_PHP] = DOMAIN_RK3562("php", BIT(7), BIT(8), BIT(8), 0, false), +}; + static const struct rockchip_domain_info rk3568_pm_domains[] = { [RK3568_PD_NPU] = DOMAIN_RK3568("npu", BIT(1), BIT(2), false), [RK3568_PD_GPU] = DOMAIN_RK3568("gpu", BIT(0), BIT(1), false), @@ -1331,6 +1361,18 @@ static const struct rockchip_pmu_info rk3399_pmu = { .domain_info = rk3399_pm_domains, }; +static const struct rockchip_pmu_info rk3562_pmu = { + .pwr_offset = 0x210, + .status_offset = 0x230, + .req_offset = 0x110, + .idle_offset = 0x128, + .ack_offset = 0x120, + .clk_ungate_offset = 0x140, + + .num_domains = ARRAY_SIZE(rk3562_pm_domains), + .domain_info = rk3562_pm_domains, +}; + static const struct rockchip_pmu_info rk3568_pmu = { .pwr_offset = 0xa0, .status_offset = 0x98, @@ -1429,6 +1471,10 @@ static const struct of_device_id rockchip_pm_domain_dt_match[] = { .compatible = "rockchip,rk3399-power-controller", .data = (void *)&rk3399_pmu, }, + { + .compatible = "rockchip,rk3562-power-controller", + .data = (void *)&rk3562_pmu, + }, { .compatible = "rockchip,rk3568-power-controller", .data = (void *)&rk3568_pmu,