From patchwork Mon Feb 17 06:11:43 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yao Zi X-Patchwork-Id: 13977108 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A366DC021A0 for ; Mon, 17 Feb 2025 06:19:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ho9lwYgI0OZCQRSvMBnGOJtgWcc4M2e0yywbbBWavcg=; b=qKdrTXd3ZVPhRc nEjjUjf1wQpngYbFWlDJjmzgaoSaM3qO0m7HCqxJt+eVGKH/VSjzk5ldAVdF8YgGzJjgGEL1sjUUA 8vHlGKeMznnfBSF8uD6P+BkqI7fWHtZ6d0dHttbD21Ut5Y9T5ogIsLCs9zI52R1X9FEfQs7equ9fe OGZkfRgG0fvLRp83f7M573f++U5/KxOxWTKbuTLGVAm9UEPFnELUyxvBdeljhg84YmnIKLu7zy9f1 MXc8nlenn0OxyZsh/3inO7oroNV5/gjd9BdYjr8yYvBHy2esCcN+3mdcR/epCve9NVF9nxUNKw51Z SkYuzMaokV6TryVzy5Cw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tjuTD-00000003SO5-0c6I; Mon, 17 Feb 2025 06:19:07 +0000 Received: from layka.disroot.org ([178.21.23.139]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tjuNa-00000003RTI-0mmZ; Mon, 17 Feb 2025 06:13:19 +0000 Received: from mail01.disroot.lan (localhost [127.0.0.1]) by disroot.org (Postfix) with ESMTP id 1482625B74; Mon, 17 Feb 2025 07:13:15 +0100 (CET) X-Virus-Scanned: SPAM Filter at disroot.org Received: from layka.disroot.org ([127.0.0.1]) by localhost (disroot.org [127.0.0.1]) (amavis, port 10024) with ESMTP id h3J08wnY5d9p; Mon, 17 Feb 2025 07:13:14 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=disroot.org; s=mail; t=1739772794; bh=58xzbLCdhNCilxabqnQbn6q6tobvOe7G9WeMgslUdXY=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=BfG3D5WKvdopBWufa82rVui6rj7ZIjL2eUJDRKkmBYPFAc/wgD7+TLBOUQom9Jcaf 2hXqZbX2n5qNh1UOhZkl163Uj8vxa/NDDYOl2jJA7maBA57IVZCne6YNs8oFhrvrQn GE3jLCHEJcTpio82h5H4J78npXOKXIPKq7dH4o25ARDjkNw1s2XI15rphcskVeib+/ IrCDVzUQF0JzOkupWHAkJ1hQTC7yDiiilCNSYWF+Q+7mynmDN+Cj4nebUNULAi/nRl 8d1IbOSJfCi8KKEGbVfzc1Vc/Me8QnjdMzt8F4jQsBRe7HBTyXdTEVc/v337gr8XTR iKCs9SEM4ecZQ== From: Yao Zi To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Philipp Zabel Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Yao Zi Subject: [PATCH v3 2/5] clk: rockchip: Add PLL flag ROCKCHIP_PLL_FIXED_MODE Date: Mon, 17 Feb 2025 06:11:43 +0000 Message-ID: <20250217061142.38480-7-ziyao@disroot.org> In-Reply-To: <20250217061142.38480-5-ziyao@disroot.org> References: <20250217061142.38480-5-ziyao@disroot.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250216_221318_355534_A77839DE X-CRM114-Status: GOOD ( 13.84 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org RK3528 comes with a new PLL variant: its "PPLL", which mainly generates clocks for the PCIe controller, operates in normal mode only. Let's describe it with flag ROCKCHIP_PLL_FIXED_MODE and handle it in code. Signed-off-by: Yao Zi --- drivers/clk/rockchip/clk-pll.c | 10 ++++++---- drivers/clk/rockchip/clk.h | 2 ++ 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/clk/rockchip/clk-pll.c b/drivers/clk/rockchip/clk-pll.c index fe76756e592e..2c2abb3b4210 100644 --- a/drivers/clk/rockchip/clk-pll.c +++ b/drivers/clk/rockchip/clk-pll.c @@ -204,10 +204,12 @@ static int rockchip_rk3036_pll_set_params(struct rockchip_clk_pll *pll, rockchip_rk3036_pll_get_params(pll, &cur); cur.rate = 0; - cur_parent = pll_mux_ops->get_parent(&pll_mux->hw); - if (cur_parent == PLL_MODE_NORM) { - pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW); - rate_change_remuxed = 1; + if (!(pll->flags & ROCKCHIP_PLL_FIXED_MODE)) { + cur_parent = pll_mux_ops->get_parent(&pll_mux->hw); + if (cur_parent == PLL_MODE_NORM) { + pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW); + rate_change_remuxed = 1; + } } /* update pll values */ diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h index 9b37d44b9e5d..460de5a67faf 100644 --- a/drivers/clk/rockchip/clk.h +++ b/drivers/clk/rockchip/clk.h @@ -444,6 +444,7 @@ struct rockchip_pll_rate_table { * Flags: * ROCKCHIP_PLL_SYNC_RATE - check rate parameters to match against the * rate_table parameters and ajust them if necessary. + * ROCKCHIP_PLL_FIXED_MODE - the pll operates in normal mode only */ struct rockchip_pll_clock { unsigned int id; @@ -461,6 +462,7 @@ struct rockchip_pll_clock { }; #define ROCKCHIP_PLL_SYNC_RATE BIT(0) +#define ROCKCHIP_PLL_FIXED_MODE BIT(1) #define PLL(_type, _id, _name, _pnames, _flags, _con, _mode, _mshift, \ _lshift, _pflags, _rtable) \