@@ -576,7 +576,7 @@
ranges;
gpio0: gpio@2007c000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3036-gpio-bank";
reg = <0x2007c000 0x100>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO0>;
@@ -589,7 +589,7 @@
};
gpio1: gpio@20080000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3036-gpio-bank";
reg = <0x20080000 0x100>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
@@ -602,7 +602,7 @@
};
gpio2: gpio@20084000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3036-gpio-bank";
reg = <0x20084000 0x100>;
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
@@ -274,7 +274,7 @@
ranges;
gpio0: gpio@20034000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3066a-gpio-bank";
reg = <0x20034000 0x100>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO0>;
@@ -287,7 +287,7 @@
};
gpio1: gpio@2003c000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3066a-gpio-bank";
reg = <0x2003c000 0x100>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
@@ -300,7 +300,7 @@
};
gpio2: gpio@2003e000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3066a-gpio-bank";
reg = <0x2003e000 0x100>;
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
@@ -313,7 +313,7 @@
};
gpio3: gpio@20080000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3066a-gpio-bank";
reg = <0x20080000 0x100>;
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
@@ -326,7 +326,7 @@
};
gpio4: gpio@20084000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3066a-gpio-bank";
reg = <0x20084000 0x100>;
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO4>;
@@ -339,7 +339,7 @@
};
gpio6: gpio@2000a000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3066a-gpio-bank";
reg = <0x2000a000 0x100>;
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO6>;
@@ -471,7 +471,7 @@
ranges;
gpio0: gpio@2007c000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3128-gpio-bank";
reg = <0x2007c000 0x100>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO0>;
@@ -482,7 +482,7 @@
};
gpio1: gpio@20080000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3128-gpio-bank";
reg = <0x20080000 0x100>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
@@ -493,7 +493,7 @@
};
gpio2: gpio@20084000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3128-gpio-bank";
reg = <0x20084000 0x100>;
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
@@ -504,7 +504,7 @@
};
gpio3: gpio@20088000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3128-gpio-bank";
reg = <0x20088000 0x100>;
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
@@ -238,7 +238,7 @@
};
gpio1: gpio@2003c000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3188-gpio-bank";
reg = <0x2003c000 0x100>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
@@ -251,7 +251,7 @@
};
gpio2: gpio@2003e000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3188-gpio-bank";
reg = <0x2003e000 0x100>;
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
@@ -264,7 +264,7 @@
};
gpio3: gpio@20080000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3188-gpio-bank";
reg = <0x20080000 0x100>;
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
@@ -949,7 +949,7 @@
ranges;
gpio0: gpio@11110000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3228-gpio-bank";
reg = <0x11110000 0x100>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO0>;
@@ -962,7 +962,7 @@
};
gpio1: gpio@11120000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3228-gpio-bank";
reg = <0x11120000 0x100>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
@@ -975,7 +975,7 @@
};
gpio2: gpio@11130000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3228-gpio-bank";
reg = <0x11130000 0x100>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
@@ -988,7 +988,7 @@
};
gpio3: gpio@11140000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3228-gpio-bank";
reg = <0x11140000 0x100>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
@@ -1425,7 +1425,7 @@
ranges;
gpio0: gpio@ff750000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3288-gpio-bank";
reg = <0x0 0xff750000 0x0 0x100>;
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO0>;
@@ -1438,7 +1438,7 @@
};
gpio1: gpio@ff780000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3288-gpio-bank";
reg = <0x0 0xff780000 0x0 0x100>;
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
@@ -1451,7 +1451,7 @@
};
gpio2: gpio@ff790000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3288-gpio-bank";
reg = <0x0 0xff790000 0x0 0x100>;
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
@@ -1464,7 +1464,7 @@
};
gpio3: gpio@ff7a0000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3288-gpio-bank";
reg = <0x0 0xff7a0000 0x0 0x100>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
@@ -1477,7 +1477,7 @@
};
gpio4: gpio@ff7b0000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3288-gpio-bank";
reg = <0x0 0xff7b0000 0x0 0x100>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO4>;
@@ -1490,7 +1490,7 @@
};
gpio5: gpio@ff7c0000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3288-gpio-bank";
reg = <0x0 0xff7c0000 0x0 0x100>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO5>;
@@ -1503,7 +1503,7 @@
};
gpio6: gpio@ff7d0000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3288-gpio-bank";
reg = <0x0 0xff7d0000 0x0 0x100>;
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO6>;
@@ -1516,7 +1516,7 @@
};
gpio7: gpio@ff7e0000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3288-gpio-bank";
reg = <0x0 0xff7e0000 0x0 0x100>;
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO7>;
@@ -1529,7 +1529,7 @@
};
gpio8: gpio@ff7f0000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3288-gpio-bank";
reg = <0x0 0xff7f0000 0x0 0x100>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO8>;
@@ -596,7 +596,7 @@
ranges;
gpio0: gpio@20030000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rv1108-gpio-bank";
reg = <0x20030000 0x100>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO0_PMU>;
@@ -609,7 +609,7 @@
};
gpio1: gpio@10310000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rv1108-gpio-bank";
reg = <0x10310000 0x100>;
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
@@ -622,7 +622,7 @@
};
gpio2: gpio@10320000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rv1108-gpio-bank";
reg = <0x10320000 0x100>;
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
@@ -635,7 +635,7 @@
};
gpio3: gpio@10330000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rv1108-gpio-bank";
reg = <0x10330000 0x100>;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
@@ -428,7 +428,7 @@
ranges;
gpio0: gpio@ff460000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rv1126-gpio-bank";
reg = <0xff460000 0x100>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>;
@@ -439,7 +439,7 @@
};
gpio1: gpio@ff620000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rv1126-gpio-bank";
reg = <0xff620000 0x100>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>;
@@ -450,7 +450,7 @@
};
gpio2: gpio@ff630000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rv1126-gpio-bank";
reg = <0xff630000 0x100>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>;
@@ -461,7 +461,7 @@
};
gpio3: gpio@ff640000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rv1126-gpio-bank";
reg = <0xff640000 0x100>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>;
@@ -472,7 +472,7 @@
};
gpio4: gpio@ff650000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rv1126-gpio-bank";
reg = <0xff650000 0x100>;
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>;
@@ -1382,7 +1382,7 @@
ranges;
gpio0: gpio@ff040000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,px30-gpio-bank";
reg = <0x0 0xff040000 0x0 0x100>;
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pmucru PCLK_GPIO0_PMU>;
@@ -1394,7 +1394,7 @@
};
gpio1: gpio@ff250000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,px30-gpio-bank";
reg = <0x0 0xff250000 0x0 0x100>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
@@ -1406,7 +1406,7 @@
};
gpio2: gpio@ff260000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,px30-gpio-bank";
reg = <0x0 0xff260000 0x0 0x100>;
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
@@ -1418,7 +1418,7 @@
};
gpio3: gpio@ff270000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,px30-gpio-bank";
reg = <0x0 0xff270000 0x0 0x100>;
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
@@ -1045,7 +1045,7 @@
ranges;
gpio0: gpio@ff210000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3328-gpio-bank";
reg = <0x0 0xff210000 0x0 0x100>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO0>;
@@ -1058,7 +1058,7 @@
};
gpio1: gpio@ff220000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3328-gpio-bank";
reg = <0x0 0xff220000 0x0 0x100>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
@@ -1071,7 +1071,7 @@
};
gpio2: gpio@ff230000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3328-gpio-bank";
reg = <0x0 0xff230000 0x0 0x100>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
@@ -1084,7 +1084,7 @@
};
gpio3: gpio@ff240000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3328-gpio-bank";
reg = <0x0 0xff240000 0x0 0x100>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
Currently all Rockchip gpio nodes have the same compatible. Replace all the compatibles in gpio nodes to be able to give them a consistent ID independent from probe order or alias. Signed-off-by: Johan Jonker <jbx6244@gmail.com> --- arch/arm/boot/dts/rk3036.dtsi | 6 +++--- arch/arm/boot/dts/rk3066a.dtsi | 12 ++++++------ arch/arm/boot/dts/rk3128.dtsi | 8 ++++---- arch/arm/boot/dts/rk3188.dtsi | 6 +++--- arch/arm/boot/dts/rk322x.dtsi | 8 ++++---- arch/arm/boot/dts/rk3288.dtsi | 18 +++++++++--------- arch/arm/boot/dts/rv1108.dtsi | 8 ++++---- arch/arm/boot/dts/rv1126.dtsi | 10 +++++----- arch/arm64/boot/dts/rockchip/px30.dtsi | 8 ++++---- arch/arm64/boot/dts/rockchip/rk3328.dtsi | 8 ++++---- 10 files changed, 46 insertions(+), 46 deletions(-) -- 2.20.1