From patchwork Tue Apr 25 13:16:16 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guillaume Tucker X-Patchwork-Id: 9698145 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id B700660249 for ; Tue, 25 Apr 2017 13:17:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C99102857F for ; Tue, 25 Apr 2017 13:17:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id BE2D4285E2; Tue, 25 Apr 2017 13:17:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 547E32857F for ; Tue, 25 Apr 2017 13:17:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=Sjmru27GnH9zq4gcZBgJT6V20uNWhwDeR1952wmtLuA=; b=XiqYgwDeZMiC09W7UeJn4jHrWT khwQGBxOrN8Zn3y/3Ots436id7S7xCPVm5Cw0k1elXnZWhL7bU7pzW5NHkOqgxDcSyz1nKak2Ou6e mUecdAViiGdc1wkLpMqx+sJolw0cosIwuWyxPfbC5MbzbIt0HEU8d6n6ODk89xk3fWUuBD9uWhBZi 9NtrfEmtEmH81HUsswnl70Pv9DxtcGTGnWLcJqkcCCLwZ9YPO3Xy5HBmdYI0ogdvPLZp8sib5Fkhf KHvO8Wkh+ZFcv2c2Uy1Ry5orgZCEU8s0cFdrN9a/AN2rpvIqlFus5eZUjTjBW7CVgRNXGRqzjXIPH jEbPVfkg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1d30LX-0003cC-Oi; Tue, 25 Apr 2017 13:17:35 +0000 Received: from bhuna.collabora.co.uk ([46.235.227.227]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1d30Kv-0002iP-Py; Tue, 25 Apr 2017 13:17:05 +0000 Received: from submarine.cbg.collabora.co.uk (unknown [IPv6:2a00:5f00:102:0:7de6:f13b:7fcc:793a]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: gtucker) by bhuna.collabora.co.uk (Postfix) with ESMTPSA id 9836C26AF5A; Tue, 25 Apr 2017 14:16:31 +0100 (BST) From: Guillaume Tucker To: Rob Herring , Mark Rutland , =?UTF-8?q?Heiko=20St=C3=BCbner?= , Neil Armstrong Subject: [PATCH v4 1/5] dt-bindings: gpu: add bindings for the ARM Mali Midgard GPU Date: Tue, 25 Apr 2017 14:16:16 +0100 Message-Id: <9349c8ae9091fbd93e9410f4cfae770ac850bf6b.1493125299.git.guillaume.tucker@collabora.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170425_061658_182732_42A40A61 X-CRM114-Status: GOOD ( 12.86 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Guillaume Tucker , Sjoerd Simons , Wookey , linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, John Reitan , Enric Balletbo i Serra , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The ARM Mali Midgard GPU family is present in a number of SoCs from many different vendors such as Samsung Exynos and Rockchip. Import the device tree bindings documentation from the r16p0 release of the Mali Midgard GPU kernel driver: https://developer.arm.com/-/media/Files/downloads/mali-drivers/kernel/mali-midgard-gpu/TX011-SW-99002-r16p0-00rel0.tgz Remove the copyright and GPL licence header as deemed not necessary. Redesign the "compatible" property strings to list all the Mali Midgard GPU types and include optional vendor ones. Drop the "clock-names" property as only one clock is used by the Mali Midgard driver (which now needs to call clk_get with NULL). Convert the "interrupt-names" property values to lower-case: "job", "mmu" and "gpu". Replace the deprecated "operating-points" optional property with "operating-points-v2". Omit the following optional properties in this initial version as they are only used in very specific cases: * snoop_enable_smc * snoop_disable_smc * jm_config * power_model * system-coherency * ipa-model Update the example accordingly to reflect all these changes. CC: John Reitan Tested-by: Enric Balletbo i Serra Signed-off-by: Guillaume Tucker --- .../devicetree/bindings/gpu/arm,mali-midgard.txt | 82 ++++++++++++++++++++++ 1 file changed, 82 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt new file mode 100644 index 000000000000..547ddeceb498 --- /dev/null +++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt @@ -0,0 +1,82 @@ +ARM Mali Midgard GPU +==================== + +Required properties: + +- compatible : + * Must be one of the following: + + "arm,mali-t60x" + + "arm,mali-t62x" + + "arm,mali-t720" + + "arm,mali-t760" + + "arm,mali-t820" + + "arm,mali-t830" + + "arm,mali-t860" + + "arm,mali-t880" + * And, optionally, one of the vendor specific compatible: + + "amlogic,meson-gxm-mali" + + "rockchip,rk3288-mali" + +- reg : Physical base address of the device and length of the register area. + +- interrupts : Contains the three IRQ lines required by Mali Midgard devices. + +- interrupt-names : Contains the names of IRQ resources in the order they were + provided in the interrupts property. Must contain: "job", "mmu", "gpu". + + +Optional properties: + +- clocks : Phandle to clock for the Mali Midgard device. + +- mali-supply : Phandle to regulator for the Mali device. Refer to + Documentation/devicetree/bindings/regulator/regulator.txt for details. + +- operating-points-v2 : Refer to Documentation/devicetree/bindings/power/opp.txt + for details. + + +Example for a Mali-T602: + +gpu@fc010000 { + compatible = "arm,mali-t60x", "arm,mali-midgard"; + reg = <0xfc010000 0x4000>; + interrupts = <0 36 4>, <0 37 4>, <0 38 4>; + interrupt-names = "job", "mmu", "gpu"; + clocks = <&pclk_mali>; + mali-supply = <&vdd_mali>; + operating-points-v2 = <&gpu_opp_table>; +}; + +gpu_opp_table: opp_table0 { + compatible = "operating-points-v2"; + + opp@533000000 { + opp-hz = /bits/ 64 <533000000>; + opp-microvolt = <1250000>; + }; + opp@450000000 { + opp-hz = /bits/ 64 <450000000>; + opp-microvolt = <1150000>; + }; + opp@400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <1125000>; + }; + opp@350000000 { + opp-hz = /bits/ 64 <350000000>; + opp-microvolt = <1075000>; + }; + opp@266000000 { + opp-hz = /bits/ 64 <266000000>; + opp-microvolt = <1025000>; + }; + opp@160000000 { + opp-hz = /bits/ 64 <160000000>; + opp-microvolt = <925000>; + }; + opp@100000000 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <912500>; + }; +};