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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id b7-20020a17090630c700b0072aebed5937sm535249ejb.221.2022.07.05.06.04.28 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 05 Jul 2022 06:04:28 -0700 (PDT) Message-ID: Date: Tue, 5 Jul 2022 15:04:28 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.8.0 From: Johan Jonker Subject: [PATCH v1 2/6] rockchip: spl: allow more boot devices To: Kever Yang , Simon Glass , Philipp Tomsich , xypron.glpk@gmx.de, U-Boot-Denx , Yifeng Zhao , jon.lin@rock-chips.com, "open list:ARM/Rockchip SoC support" , miquel.raynal@bootlin.com, michael@amarulasolutions.com, dario.binacchi@amarulasolutions.com References: <20220701094304.1846-1-jbx6244@yandex.com> Content-Language: en-US In-Reply-To: <20220701094304.1846-1-jbx6244@yandex.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220705_060431_190400_6ECB3121 X-CRM114-Status: GOOD ( 11.63 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org From: Johan Jonker Rockchip SoCs have more boot device options then currently included in the function spl_boot_device(). Make this function generic for SPI and NAND. Signed-off-by: Johan Jonker --- This patch should replace a patch in the serie called: [PATCH v1 02/17] rockchip: spl: allow more boot devices https://lore.kernel.org/u-boot/20220508150825.21711-3-jbx6244@gmail.com/ Changed: replace #elseif by #elif --- arch/arm/mach-rockchip/spl.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c index ceef9d91..aab3804f 100644 --- a/arch/arm/mach-rockchip/spl.c +++ b/arch/arm/mach-rockchip/spl.c @@ -53,13 +53,16 @@ u32 spl_boot_device(void) { u32 boot_device = BOOT_DEVICE_MMC1; -#if defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \ +#if defined(CONFIG_SPI_BOOT) || \ + defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \ defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \ defined(CONFIG_TARGET_CHROMEBOOK_MINNIE) || \ defined(CONFIG_TARGET_CHROMEBOOK_SPEEDY) || \ defined(CONFIG_TARGET_CHROMEBOOK_BOB) || \ defined(CONFIG_TARGET_CHROMEBOOK_KEVIN) return BOOT_DEVICE_SPI; +#elif defined(CONFIG_NAND_BOOT) + return BOOT_DEVICE_NAND; #endif if (CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)) return BOOT_DEVICE_BOOTROM;