[v3,0/4] spi support for Exynos Auto v9 SoC

Message

Chanho Park June 29, 2022, 10:23 a.m. UTC

Add to support Exynos Auto v9 SoC's spi. By supporting USI(Universal
Serial Interface) mode, the SoC can support up to 12 spi ports. Thus, we
need to increase MAX_SPI_PORTS from 6 to 12. The spi of the SoC can
support loopback mode unlike previous exynos SoCs. To separate the
feature, we need to add .has_loopback to the s3c64xx_spi_port_config.
Furthermore, it uses 4 as the default internal clock divider. We also
need to clk_div field of the structure and assign "2" as the default
value to the existing SoC's port config.
Device tree definitions of exynosautov9-spi will be added in separated
patchset to include usi(i2c/uart/spi) nodes all together.

Changes from v2:
- Rebase the patches on top of the latest next/master (next-20220629)
- Add Andy's R-B tags for #1, #3 and #4 patches
- Add Krzysztof's R-B tag for #4 patch
- Drop div local variable assignment as suggested by Krzysztof
- Change the data type of 'div' local variables to be consistent with
  clk_div (Pointed by Andy)

Changes from v1:
- Patch #1 "increase MAX_SPI_PORTS to 12" has been squashed to the patch #4
- Add Krzysztof's RB tags for #1 and #3 patches
- Assign clk_div value to 2 for existing SoC's port configs
- Make const of exynosautov9_spi_port_config

Chanho Park (4):
  spi: s3c64xx: support loopback mode
  spi: s3c64xx: support custom value of internal clock divider
  dt-bindings: samsung,spi: define exynosautov9 compatible
  spi: s3c64xx: add spi port configuration for Exynos Auto v9 SoC

 .../devicetree/bindings/spi/samsung,spi.yaml  |  5 +-
 drivers/spi/spi-s3c64xx.c                     | 54 +++++++++++++++----
 2 files changed, 49 insertions(+), 10 deletions(-)

Comments

Mark Brown June 29, 2022, 2:44 p.m. UTC | #1

On Wed, 29 Jun 2022 19:23:00 +0900, Chanho Park wrote:
> Add to support Exynos Auto v9 SoC's spi. By supporting USI(Universal
> Serial Interface) mode, the SoC can support up to 12 spi ports. Thus, we
> need to increase MAX_SPI_PORTS from 6 to 12. The spi of the SoC can
> support loopback mode unlike previous exynos SoCs. To separate the
> feature, we need to add .has_loopback to the s3c64xx_spi_port_config.
> Furthermore, it uses 4 as the default internal clock divider. We also
> need to clk_div field of the structure and assign "2" as the default
> value to the existing SoC's port config.
> Device tree definitions of exynosautov9-spi will be added in separated
> patchset to include usi(i2c/uart/spi) nodes all together.
> 
> [...]

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next

Thanks!

[1/4] spi: s3c64xx: support loopback mode
      commit: ffb7bcd3b27e86fa7bdbabf4488060064ec9d00d
[2/4] spi: s3c64xx: support custom value of internal clock divider
      commit: bfcd27dcb7b93bd1f3b89d03d8b90207876d635f
[3/4] dt-bindings: samsung,spi: define exynosautov9 compatible
      commit: 9dbeef8ad5f8e7d2cab7b888853b4abe9db87ffd
[4/4] spi: s3c64xx: add spi port configuration for Exynos Auto v9 SoC
      commit: 11d50d853dceb2df8d28bf772d3e928c1c5b137a

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark