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[71.218.50.136]) by smtp.gmail.com with ESMTPSA id gw3-20020a0566381ee300b0046b692e719esm3207609jab.150.2023.12.26.11.21.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Dec 2023 11:21:58 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: AngeloGioacchino Del Regno , Krzysztof Kozlowski , Rob Herring , Konrad Dybcio , Sudeep Holla , Andy Shevchenko , Raul Rangel , Tzung-Bi Shih , Mark Hasemeyer , AKASHI Takahiro , Alexandre TORGUE , Alim Akhtar , Andre Przywara , Andrew Morton , Andy Shevchenko , Baoquan He , Bartosz Golaszewski , Benson Leung , Bhanu Prakash Maiya , Bjorn Andersson , Chen-Yu Tsai , Conor Dooley , Daniel Scally , David Gow , Enric Balletbo i Serra , Frank Rowand , Greg Kroah-Hartman , Guenter Roeck , Heikki Krogerus , Heiko Stuebner , Jonathan Hunter , Krzysztof Kozlowski , Lee Jones , Len Brown , Linus Walleij , Manivannan Sadhasivam , Mark Brown , Matthias Brugger , Michal Simek , Mika Westerberg , Nick Hawkins , Prashant Malani , "Rafael J. Wysocki" , Rob Barnes , Rob Herring , Sakari Ailus , Stephen Boyd , Takashi Iwai , Thierry Reding , Tony Lindgren , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Wolfram Sang , chrome-platform@lists.linux.dev, cros-qcom-dts-watchers@chromium.org, devicetree@vger.kernel.org, linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, linux-i2c@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v3 00/24] Improve IRQ wake capability reporting and update the cros_ec driver to use it Date: Tue, 26 Dec 2023 12:21:04 -0700 Message-ID: <20231226192149.1830592-1-markhas@chromium.org> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Currently the cros_ec driver assumes that its associated interrupt is wake capable. This is an incorrect assumption as some Chromebooks use a separate wake pin, while others overload the interrupt for wake and IO. This patch train updates the driver to query the underlying ACPI/DT data to determine whether or not the IRQ should be enabled for wake. Both the device tree and ACPI systems have methods for reporting IRQ wake capability. In device tree based systems, a node can advertise itself as a 'wakeup-source'. In ACPI based systems, GpioInt and Interrupt resource descriptors can use the 'SharedAndWake' or 'ExclusiveAndWake' share types. Some logic is added to the platform, ACPI, and DT subsystems to more easily pipe wakeirq information up to the driver. Changes in v3: -Rebase on linux-next -See each patch for patch specific changes Changes in v2: -Rebase on linux-next -Add cover letter -See each patch for patch specific changes Mark Hasemeyer (24): resource: Add DEFINE_RES_*_NAMED_FLAGS macro gpiolib: acpi: Modify acpi_dev_irq_wake_get_by() to use resource i2c: acpi: Modify i2c_acpi_get_irq() to use resource dt-bindings: power: Clarify wording for wakeup-source property ARM: dts: tegra: Enable cros-ec-spi as wake source ARM: dts: rockchip: rk3288: Enable cros-ec-spi as wake source ARM: dts: samsung: exynos5420: Enable cros-ec-spi as wake source ARM: dts: samsung: exynos5800: Enable cros-ec-spi as wake source arm64: dts: mediatek: mt8173: Enable cros-ec-spi as wake source arm64: dts: mediatek: mt8183: Enable cros-ec-spi as wake source arm64: dts: mediatek: mt8192: Enable cros-ec-spi as wake source arm64: dts: mediatek: mt8195: Enable cros-ec-spi as wake source arm64: dts: tegra: Enable cros-ec-spi as wake source arm64: dts: qcom: sc7180: Enable cros-ec-spi as wake source arm64: dts: qcom: sc7280: Enable cros-ec-spi as wake source arm64: dts: qcom: sdm845: Enable cros-ec-spi as wake source arm64: dts: rockchip: rk3399: Enable cros-ec-spi as wake source of: irq: add wake capable bit to of_irq_resource() of: irq: Add default implementation for of_irq_to_resource() of: irq: Remove extern from function declarations device property: Modify fwnode irq_get() to use resource device property: Update functions to use EXPORT_SYMBOL_GPL platform: Modify platform_get_irq_optional() to use resource platform/chrome: cros_ec: Use PM subsystem to manage wakeirq .../bindings/power/wakeup-source.txt | 18 +++-- arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi | 1 + arch/arm/boot/dts/nvidia/tegra124-venice2.dts | 1 + .../rockchip/rk3288-veyron-chromebook.dtsi | 1 + .../boot/dts/samsung/exynos5420-peach-pit.dts | 1 + .../boot/dts/samsung/exynos5800-peach-pi.dts | 1 + arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi | 1 + .../arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 1 + .../boot/dts/mediatek/mt8192-asurada.dtsi | 1 + .../boot/dts/mediatek/mt8195-cherry.dtsi | 1 + .../arm64/boot/dts/nvidia/tegra132-norrin.dts | 1 + arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi | 1 + .../arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 1 + .../arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi | 1 + arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi | 1 + arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi | 1 + drivers/acpi/property.c | 11 ++- drivers/base/platform.c | 70 +++++++++++++------ drivers/base/property.c | 32 +++++++-- drivers/gpio/gpiolib-acpi.c | 27 ++++--- drivers/i2c/i2c-core-acpi.c | 37 +++++----- drivers/i2c/i2c-core-base.c | 6 +- drivers/i2c/i2c-core.h | 4 +- drivers/of/irq.c | 39 +++++++++-- drivers/of/property.c | 8 +-- drivers/platform/chrome/cros_ec.c | 48 ++++++++++--- drivers/platform/chrome/cros_ec_lpc.c | 32 ++++++++- drivers/platform/chrome/cros_ec_spi.c | 15 ++-- drivers/platform/chrome/cros_ec_uart.c | 22 ++++-- include/linux/acpi.h | 23 +++--- include/linux/fwnode.h | 8 ++- include/linux/ioport.h | 20 ++++-- include/linux/of_irq.h | 41 ++++++----- include/linux/platform_data/cros_ec_proto.h | 4 +- include/linux/platform_device.h | 3 + include/linux/property.h | 2 + 36 files changed, 336 insertions(+), 149 deletions(-)