From patchwork Tue Apr 1 04:03:35 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jingoo Han X-Patchwork-Id: 3918501 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 3C4F3BF540 for ; Tue, 1 Apr 2014 04:03:43 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4EB0A203AF for ; Tue, 1 Apr 2014 04:03:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 23BBC20240 for ; Tue, 1 Apr 2014 04:03:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751032AbaDAEDk (ORCPT ); Tue, 1 Apr 2014 00:03:40 -0400 Received: from mailout2.samsung.com ([203.254.224.25]:49342 "EHLO mailout2.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750709AbaDAEDj (ORCPT ); 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If 2kB for cfg0 and 2kB for cfg1 are set, it will make problems when a PCIe card having multiple EPs below a bridge is used. Suggested-by: Pratyush Anand Signed-off-by: Jingoo Han --- Changes since v1: - Fix unintentional modification of I/O size, per Pratyush Anand. arch/arm/boot/dts/exynos5440.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi index d600733..94b2cea 100644 --- a/arch/arm/boot/dts/exynos5440.dtsi +++ b/arch/arm/boot/dts/exynos5440.dtsi @@ -281,9 +281,9 @@ #address-cells = <3>; #size-cells = <2>; device_type = "pci"; - ranges = <0x00000800 0 0x40000000 0x40000000 0 0x00001000 /* configuration space */ - 0x81000000 0 0 0x40001000 0 0x00010000 /* downstream I/O */ - 0x82000000 0 0x40011000 0x40011000 0 0x1ffef000>; /* non-prefetchable memory */ + ranges = <0x00000800 0 0x40000000 0x40000000 0 0x00002000 /* configuration space */ + 0x81000000 0 0 0x40002000 0 0x00010000 /* downstream I/O */ + 0x82000000 0 0x40012000 0x40012000 0 0x1ffee000>; /* non-prefetchable memory */ #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0x0 0 &gic 53>; @@ -302,9 +302,9 @@ #address-cells = <3>; #size-cells = <2>; device_type = "pci"; - ranges = <0x00000800 0 0x60000000 0x60000000 0 0x00001000 /* configuration space */ - 0x81000000 0 0 0x60001000 0 0x00010000 /* downstream I/O */ - 0x82000000 0 0x60011000 0x60011000 0 0x1ffef000>; /* non-prefetchable memory */ + ranges = <0x00000800 0 0x60000000 0x60000000 0 0x00002000 /* configuration space */ + 0x81000000 0 0 0x60002000 0 0x00010000 /* downstream I/O */ + 0x82000000 0 0x60012000 0x60012000 0 0x1ffee000>; /* non-prefetchable memory */ #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0x0 0 &gic 56>;