From patchwork Fri Mar 21 14:04:38 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Seungwon Jeon X-Patchwork-Id: 3874631 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 865EC9F370 for ; Fri, 21 Mar 2014 14:04:55 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2562020295 for ; Fri, 21 Mar 2014 14:04:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id BBA9820213 for ; Fri, 21 Mar 2014 14:04:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965576AbaCUOEu (ORCPT ); Fri, 21 Mar 2014 10:04:50 -0400 Received: from mailout2.samsung.com ([203.254.224.25]:27002 "EHLO mailout2.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753276AbaCUOEp (ORCPT ); Fri, 21 Mar 2014 10:04:45 -0400 Received: from epcpsbgr4.samsung.com (u144.gpu120.samsung.co.kr [203.254.230.144]) by mailout2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0N2S00F1FHRQEJ00@mailout2.samsung.com>; Fri, 21 Mar 2014 23:04:38 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [203.254.230.47]) by epcpsbgr4.samsung.com (EPCPMTA) with SMTP id A8.E9.10364.6F64C235; Fri, 21 Mar 2014 23:04:38 +0900 (KST) X-AuditID: cbfee690-b7f266d00000287c-e1-532c46f61e9c Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 92.57.28157.6F64C235; Fri, 21 Mar 2014 23:04:38 +0900 (KST) Received: from DOTGIHJUN01 ([12.36.185.168]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0N2S00D6HHRQ5C90@mmp2.samsung.com>; Fri, 21 Mar 2014 23:04:38 +0900 (KST) From: Seungwon Jeon To: linux-samsung-soc@vger.kernel.org, linux-mmc@vger.kernel.org Cc: 'Chris Ball' , 'Kukjin Kim' , 'Jaehoon Chung' , 'Ulf Hansson' , 'Alim Akhtar' Subject: [PATCH 6/7] ARM: dts: drop dw-mshc-ciu-div property from Exynos Date: Fri, 21 Mar 2014 23:04:38 +0900 Message-id: <002001cf450e$7f9a6fc0$7ecf4f40$%jun@samsung.com> MIME-version: 1.0 Content-type: text/plain; charset=utf-8 Content-transfer-encoding: 7bit X-Mailer: Microsoft Office Outlook 12.0 Thread-index: Ac9FDn94XEQXR2D2Q4Sit5iSmMOQfg== Content-language: ko X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrEIsWRmVeSWpSXmKPExsVy+t8zfd1vbjrBBtf3iFs8mLeNzWLC5e2M Fjd+tbFa9C64ymZx5H8/o8WM8/uYLI6vDXdg97hzbQ+bx41XC5k8+rasYvT4vEkugCWKyyYl NSezLLVI3y6BK+PWzL3MBb99KvZNX8fewPjUrouRk0NCwETi9pqNjBC2mMSFe+vZuhi5OIQE ljFKPJx9nBGmaOFuEBskMZ1R4u3TB1BVfxgl5n4+xA5SxSagJfH3zRtmEFtEwEHi3fULTCA2 s8AJRol5i41BbGEBD4nDT46D1bMIqEocvfQAbAOvgK3E3Xuz2CBsQYkfk++xdDFyAPWqS0yZ kgsxRl5i85q3zCBhCaDwo7+6EJv0JPbNe8UOUSIise/FO7A7JQROsUus+3ySCWKVgMS3yYdY IHplJTYdYIb4S1Li4IobLBMYxWYhWTwLYfEsJItnIdmwgJFlFaNoakFyQXFSepGJXnFibnFp Xrpecn7uJkZI/E3YwXjvgPUhxmSg7ROZpUST84Hxm1cSb2hsZmRhamJqbGRuaUaasJI4r9qj pCAhgfTEktTs1NSC1KL4otKc1OJDjEwcnFINjKk/3oldVMwRVOLIMxNdyFs+taLWMd/NJMCA PzB0Bt8u/+7Z1WouubP1a+2TlfS2uFiYmt1d7DdL8tKhKcdtAwJtMn/0ewecnpau1bDs0vS7 9/wzCncdnLZx/YOHpW8NxZMCeydEd5pMZZTo9kziz533v7mMh8mj5OGq5d67rq63qdrgJJmv xFKckWioxVxUnAgAWFycd9UCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprPKsWRmVeSWpSXmKPExsVy+t9jQd1vbjrBBk2rhSwezNvGZjHh8nZG ixu/2lgtehdcZbM48r+f0WLG+X1MFsfXhjuwe9y5tofN48arhUwefVtWMXp83iQXwBLVwGiT kZqYklqkkJqXnJ+SmZduq+QdHO8cb2pmYKhraGlhrqSQl5ibaqvk4hOg65aZA3SBkkJZYk4p UCggsbhYSd8O04TQEDddC5jGCF3fkCC4HiMDNJCwjjHj1sy9zAW/fSr2TV/H3sD41K6LkZND QsBEYuHu44wQtpjEhXvr2boYuTiEBKYzSrx9+gDK+cMoMffzIXaQKjYBLYm/b94wg9giAg4S 765fYAKxmQVOMErMW2wMYgsLeEgcfnIcrJ5FQFXi6KUHYBt4BWwl7t6bxQZhC0r8mHyPpYuR A6hXXWLKlFyIMfISm9e8ZQYJSwCFH/3VhdikJ7Fv3it2iBIRiX0v3jFOYBSYhWTQLIRBs5AM moWkYwEjyypG0dSC5ILipPRcI73ixNzi0rx0veT83E2M4Oh+Jr2DcVWDxSFGAQ5GJR7eCk7t YCHWxLLiytxDjBIczEoivJ12OsFCvCmJlVWpRfnxRaU5qcWHGJOB3pzILCWanA9MPHkl8YbG JmZGlkZmFkYm5uakCSuJ8x5stQ4UEkhPLEnNTk0tSC2C2cLEwSnVwFi8f9bKQ+fT2I/1ax55 eLfs3qKOQxk7HKc9nR0mp682sfEza0hRjkTzXQmbtq7IpunLpO61ck5YKszwfmHrwr2hKRe/ PvMx6XxzvfJApZxwmEDi14PVayUXzWRSdfj0cYNHMF/vHv+19vXHtX5GiJzvXKQSWibi1zb5 Owdn/A/1TWdjlzOFfVZiKc5INNRiLipOBABh9VILMgMAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP As dw-mshc-ciu-div is strongly close to timing property, it is merged with each timing property. Signed-off-by: Seungwon Jeon --- .../devicetree/bindings/mmc/exynos-dw-mshc.txt | 12 +++++------- arch/arm/boot/dts/exynos4412-odroidx.dts | 5 ++--- arch/arm/boot/dts/exynos4412-origen.dts | 5 ++--- arch/arm/boot/dts/exynos4412-trats2.dts | 5 ++--- arch/arm/boot/dts/exynos5250-arndale.dts | 10 ++++------ arch/arm/boot/dts/exynos5250-cros-common.dtsi | 15 ++++++--------- arch/arm/boot/dts/exynos5250-smdk5250.dts | 10 ++++------ arch/arm/boot/dts/exynos5420-arndale-octa.dts | 10 ++++------ arch/arm/boot/dts/exynos5420-smdk5420.dts | 10 ++++------ 9 files changed, 33 insertions(+), 49 deletions(-) diff --git a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt index 532b1d4..ca1914f 100644 --- a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt +++ b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt @@ -19,10 +19,6 @@ Required Properties: - "samsung,exynos5420-dw-mshc": for controllers with Samsung Exynos5420 specific extensions. -* samsung,dw-mshc-ciu-div: Specifies the divider value for the card interface - unit (ciu) clock. This property is applicable only for Exynos5 SoC's and - ignored for Exynos4 SoC's. The valid range of divider value is 0 to 7. - * samsung,dw-mshc-sdr-timing: Specifies the value of CIU clock phase shift value in transmit mode and CIU clock phase shift value in receive mode for single data rate mode operation. Refer notes below for the order of the cells and the @@ -38,6 +34,9 @@ Required Properties: The order of the cells should be - First Cell: CIU clock phase shift value for tx mode. - Second Cell: CIU clock phase shift value for rx mode. + - Thrid Cell: Specifies the divider value for the card interface + unit (ciu) clock. This property is applicable only for Exynos5 SoC's and + ignored for Exynos4 SoC's. The valid range of divider value is 0 to 7. Valid values for SDR and DDR CIU clock timing for Exynos5250: - valid value for tx phase shift and rx phase shift is 0 to 7. @@ -73,9 +72,8 @@ Example: broken-cd; fifo-depth = <0x80>; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 3>; + samsung,dw-mshc-ddr-timing = <1 2 3>; slot@0 { reg = <0>; diff --git a/arch/arm/boot/dts/exynos4412-odroidx.dts b/arch/arm/boot/dts/exynos4412-odroidx.dts index 9804fcb..99f32db 100644 --- a/arch/arm/boot/dts/exynos4412-odroidx.dts +++ b/arch/arm/boot/dts/exynos4412-odroidx.dts @@ -48,9 +48,8 @@ supports-highspeed; broken-cd; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 0>; + samsung,dw-mshc-ddr-timing = <1 2 0>; slot@0 { reg = <0>; diff --git a/arch/arm/boot/dts/exynos4412-origen.dts b/arch/arm/boot/dts/exynos4412-origen.dts index 6bc0539..7c0b535 100644 --- a/arch/arm/boot/dts/exynos4412-origen.dts +++ b/arch/arm/boot/dts/exynos4412-origen.dts @@ -131,9 +131,8 @@ supports-highspeed; broken-cd; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 0>; + samsung,dw-mshc-ddr-timing = <1 2 0>; slot@0 { reg = <0>; diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts index 4f851cc..556e414 100644 --- a/arch/arm/boot/dts/exynos4412-trats2.dts +++ b/arch/arm/boot/dts/exynos4412-trats2.dts @@ -451,9 +451,8 @@ card-detect-delay = <200>; vmmc-supply = <&vemmc_reg>; clock-frequency = <400000000>; - samsung,dw-mshc-ciu-div = <0>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 0>; + samsung,dw-mshc-ddr-timing = <1 2 0>; pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>; pinctrl-names = "default"; status = "okay"; diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts index b42e658..dc53b51 100644 --- a/arch/arm/boot/dts/exynos5250-arndale.dts +++ b/arch/arm/boot/dts/exynos5250-arndale.dts @@ -376,9 +376,8 @@ supports-highspeed; broken-cd; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 3>; + samsung,dw-mshc-ddr-timing = <1 2 3>; vmmc-supply = <&mmc_reg>; pinctrl-names = "default"; pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>; @@ -394,9 +393,8 @@ num-slots = <1>; supports-highspeed; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 3>; + samsung,dw-mshc-ddr-timing = <1 2 3>; vmmc-supply = <&mmc_reg>; pinctrl-names = "default"; pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; diff --git a/arch/arm/boot/dts/exynos5250-cros-common.dtsi b/arch/arm/boot/dts/exynos5250-cros-common.dtsi index 2c1560d..d550261 100644 --- a/arch/arm/boot/dts/exynos5250-cros-common.dtsi +++ b/arch/arm/boot/dts/exynos5250-cros-common.dtsi @@ -251,9 +251,8 @@ supports-highspeed; broken-cd; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 3>; + samsung,dw-mshc-ddr-timing = <1 2 3>; pinctrl-names = "default"; pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_bus4 &sd0_bus8>; @@ -267,9 +266,8 @@ num-slots = <1>; supports-highspeed; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 3>; + samsung,dw-mshc-ddr-timing = <1 2 3>; pinctrl-names = "default"; pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; @@ -285,9 +283,8 @@ supports-highspeed; broken-cd; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 3>; + samsung,dw-mshc-ddr-timing = <1 2 3>; /* See board-specific dts files for pin setup */ slot@0 { diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts index 3e69837..a59a1ae 100644 --- a/arch/arm/boot/dts/exynos5250-smdk5250.dts +++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts @@ -134,9 +134,8 @@ supports-highspeed; broken-cd; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 3>; + samsung,dw-mshc-ddr-timing = <1 2 3>; pinctrl-names = "default"; pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>; @@ -151,9 +150,8 @@ num-slots = <1>; supports-highspeed; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 3>; + samsung,dw-mshc-ddr-timing = <1 2 3>; pinctrl-names = "default"; pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts b/arch/arm/boot/dts/exynos5420-arndale-octa.dts index 7340745..ce2a50f 100644 --- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts +++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts @@ -36,9 +36,8 @@ broken-cd; supports-highspeed; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <0 4>; - samsung,dw-mshc-ddr-timing = <0 2>; + samsung,dw-mshc-sdr-timing = <0 4 3>; + samsung,dw-mshc-ddr-timing = <0 2 3>; pinctrl-names = "default"; pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>; @@ -52,9 +51,8 @@ status = "okay"; supports-highspeed; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 3>; + samsung,dw-mshc-ddr-timing = <1 2 3>; pinctrl-names = "default"; pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts b/arch/arm/boot/dts/exynos5420-smdk5420.dts index fb5a1e2..3ad4ef3 100644 --- a/arch/arm/boot/dts/exynos5420-smdk5420.dts +++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts @@ -36,9 +36,8 @@ broken-cd; supports-highspeed; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <0 4>; - samsung,dw-mshc-ddr-timing = <0 2>; + samsung,dw-mshc-sdr-timing = <0 4 3>; + samsung,dw-mshc-ddr-timing = <0 2 3>; pinctrl-names = "default"; pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>; @@ -52,9 +51,8 @@ status = "okay"; supports-highspeed; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 3>; + samsung,dw-mshc-ddr-timing = <1 2 3>; pinctrl-names = "default"; pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;