From patchwork Wed Feb 6 05:50:59 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: ??? X-Patchwork-Id: 2101851 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id DDB75DFE82 for ; Wed, 6 Feb 2013 05:51:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751869Ab3BFFvD (ORCPT ); Wed, 6 Feb 2013 00:51:03 -0500 Received: from mailout3.samsung.com ([203.254.224.33]:54539 "EHLO mailout3.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751236Ab3BFFvC (ORCPT ); Wed, 6 Feb 2013 00:51:02 -0500 Received: from epcpsbgm1.samsung.com (epcpsbgm1 [203.254.230.26]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MHS003NLAWMPRQ0@mailout3.samsung.com> for linux-samsung-soc@vger.kernel.org; Wed, 06 Feb 2013 14:51:00 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [203.254.230.47]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id F5.6B.03918.44FE1115; Wed, 06 Feb 2013 14:51:00 +0900 (KST) X-AuditID: cbfee61a-b7f7d6d000000f4e-75-5111ef4407a9 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id D4.6B.03918.44FE1115; Wed, 06 Feb 2013 14:51:00 +0900 (KST) Received: from DOSANGSU4UP02 ([12.23.118.226]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MHS00KV0AX08HU0@mmp1.samsung.com> for linux-samsung-soc@vger.kernel.org; Wed, 06 Feb 2013 14:51:00 +0900 (KST) From: Sangsu Park To: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Cc: ben-linux@fluff.org, Kukjin Kim , sbkim73@samsung.com, Tushar Behera , Sachin Kamat Subject: [PATCH V2] ARM: EXYNOS: Add clocks for EXYNOS I2S and PCM I/F Date: Wed, 06 Feb 2013 14:50:59 +0900 Message-id: <003701ce042d$f0dc9370$d295ba50$@samsung.com> MIME-version: 1.0 Content-type: text/plain; charset=us-ascii Content-transfer-encoding: 7bit X-Mailer: Microsoft Outlook 14.0 Thread-index: Ac4ELascCMLj/Yi8T/O6mSOrXcNoCw== Content-language: ko X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrKIsWRmVeSWpSXmKPExsVy+t8zfV2X94KBBnMeqVrMOL+PyYHR4/Mm uQDGKC6blNSczLLUIn27BK6MWX19LAVbxCu+X/jK2sB4S7iLkZNDQsBE4tOsDWwQtpjEhXvr gWwuDiGBZYwSSxtb2GCKdnz/DpVYxCjx+NNFZghnCZPE33mfmECq2AR0JQ6sm8PSxcjBISLg LbH8miJIDTPIpO8vQLo5OIQF3CQmn40GKWcRUJXY9PkxO0iYV8BSouejCEiYV0BQ4sfkeywg NrOAlsT6nceZIGx5ic1r3jJD3KMgsePsa0YQW0RAT+Lao4dsEDUiEvtevGMEWSsh0M8usX/h GlaIXQIS3yYfAjtNQkBWYtMBqDmSEgdX3GCZwCg2C8nqWUhWz0KyehaSFQsYWVYxiqYWJBcU J6XnGuoVJ+YWl+al6yXn525ihESK1A7GlQ0WhxgFOBiVeHhv6AkGCrEmlhVX5h5ilOBgVhLh VdgGFOJNSaysSi3Kjy8qzUktPsSYDHTsRGYp0eR8YBTnlcQbGhubmJmYmphbmpqbkiasJM7L eOpJgJBAemJJanZqakFqEcwWJg5OqQZGwwX1Zq317PpFrpmiH5enXnvRNFVV749AnqtRXQjX /t2cladVZp7YvrFsp4DZFUaWD8FBa122zNitZ3YhP0tEjf9qvdoH/tzdef9m/gvPbH9x2YXv suviRo4PW9NOlcvsrj6ZH9EpWPn2qYvjlaW/ypJVzXr+GXzZ/sfha9RJ+5OnRHzXnb+vxFKc kWioxVxUnAgACL25/9gCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrCIsWRmVeSWpSXmKPExsVy+t9jAV2X94KBBmc/ylrMOL+PyYHR4/Mm uQDGqAZGm4zUxJTUIoXUvOT8lMy8dFsl7+B453hTMwNDXUNLC3MlhbzE3FRbJRefAF23zByg qUoKZYk5pUChgMTiYiV9O0wTQkPcdC1gGiN0fUOC4HqMDNBAwjrGjFl9fSwFW8Qrvl/4ytrA eEu4i5GTQ0LARGLH9+9sELaYxIV764FsLg4hgUWMEo8/XWSGcJYwSfyd94kJpIpNQFfiwLo5 LF2MHBwiAt4Sy68pgtQwCyxjlPj+AmQSB4ewgJvE5LPRIOUsAqoSmz4/ZgcJ8wpYSvR8FAEJ 8woISvyYfI8FxGYW0JJYv/M4E4QtL7F5zVtmiHsUJHacfc0IYosI6Elce/SQDaJGRGLfi3eM ExgFZiEZNQvJqFlIRs1C0rKAkWUVo2hqQXJBcVJ6rqFecWJucWleul5yfu4mRnAcPpPawbiy weIQowAHoxIP7w09wUAh1sSy4srcQ4wSHMxKIrwK24BCvCmJlVWpRfnxRaU5qcWHGJOBHp3I LCWanA9MEXkl8YbGJmZGlkZmFkYm5uakCSuJ8zKeehIgJJCeWJKanZpakFoEs4WJg1OqgXHS nh9hmkJTXBy1FCWPftydPmuioIiL6JOLPPft57UU+t6PPf/govT/gLKPcj1qMg6tGSXTY7Qd j7/9uE2yTNbSMSn+WtXzQ1UHmTXSrMs+Oy/gFpgVZyD06fzPNwLZNo9Ov1zU08ycoX774RS7 mNW2172414k4rhCvWDb33jHHVWdmLje3Xq7EUpyRaKjFXFScCABzJtfbBwMAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Audio Subsystem has own clocks for I2S0 and PCM0 in all EXYNOS series. This patch add clocks for I2S0 and PCM0 I/F. Signed-off-by: Sangsu Park --- arch/arm/mach-exynos/Makefile | 1 + arch/arm/mach-exynos/clock-audss.c | 64 ++++++++++++++++++++++++++++++++++++ 2 files changed, 65 insertions(+), 0 deletions(-) create mode 100644 arch/arm/mach-exynos/clock-audss.c ARRAY_SIZE(exynos_init_audss_clocks)); + s3c_disable_clocks(exynos_init_audss_clocks, ARRAY_SIZE(exynos_init_audss_clocks)); +} diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile index 7e53a3a..5b6c7c0 100644 --- a/arch/arm/mach-exynos/Makefile +++ b/arch/arm/mach-exynos/Makefile @@ -13,6 +13,7 @@ obj- := # Core obj-$(CONFIG_ARCH_EXYNOS) += common.o +obj-$(CONFIG_ARCH_EXYNOS) += clock-audss.o obj-$(CONFIG_ARCH_EXYNOS4) += clock-exynos4.o obj-$(CONFIG_CPU_EXYNOS4210) += clock-exynos4210.o obj-$(CONFIG_SOC_EXYNOS4212) += clock-exynos4212.o diff --git a/arch/arm/mach-exynos/clock-audss.c b/arch/arm/mach-exynos/clock-audss.c new file mode 100644 index 0000000..e817655 --- /dev/null +++ b/arch/arm/mach-exynos/clock-audss.c @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Clock support for EXYNOS Audio Subsystem + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include + +#include +#include + +#define EXYNOS_PA_AUDSS (0x03810000) + +/* IP Clock Gate 0 Registers */ +#define EXYNOS_AUDSS_CLKGATE_I2SBUS (1<<2) +#define EXYNOS_AUDSS_CLKGATE_I2SSPECIAL (1<<3) +#define EXYNOS_AUDSS_CLKGATE_PCMBUS (1<<4) +#define EXYNOS_AUDSS_CLKGATE_PCMSPECIAL (1<<5) +#define EXYNOS_AUDSS_CLKGATE_GPIO (1<<6) + +static void __iomem *clk_audss_base = 0; + +static int exynos_clk_audss_ctrl(struct clk *clk, int enable) +{ + if (!clk_audss_base) + return -ENOMEM; + + return s5p_gatectrl(clk_audss_base, clk, enable); +} + +static struct clk exynos_init_audss_clocks[] = { + { + .name = "iis", + .devname = "samsung-i2s.0", + .enable = exynos_clk_audss_ctrl, + .ctrlbit = EXYNOS_AUDSS_CLKGATE_I2SSPECIAL | EXYNOS_AUDSS_CLKGATE_I2SBUS + | EXYNOS_AUDSS_CLKGATE_GPIO, + }, { + .name = "pcm", + .devname = "samsung-pcm.0", + .enable = exynos_clk_audss_ctrl, + .ctrlbit = EXYNOS_AUDSS_CLKGATE_PCMSPECIAL | EXYNOS_AUDSS_CLKGATE_PCMBUS + | EXYNOS_AUDSS_CLKGATE_GPIO, + }, +}; + +void __init exynos_register_audss_clocks(void) +{ + clk_audss_base = ioremap(EXYNOS_PA_AUDSS, SZ_4K); + if (clk_audss_base == NULL) { + pr_err("unable to ioremap for gpio_base1\n"); + return; + } + + s3c_register_clocks(exynos_init_audss_clocks,