From patchwork Sun Feb 10 13:20:23 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Figa X-Patchwork-Id: 2122171 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 6BC343FCA4 for ; Sun, 10 Feb 2013 13:21:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754866Ab3BJNVJ (ORCPT ); Sun, 10 Feb 2013 08:21:09 -0500 Received: from mail-ee0-f53.google.com ([74.125.83.53]:55414 "EHLO mail-ee0-f53.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755002Ab3BJNVI (ORCPT ); Sun, 10 Feb 2013 08:21:08 -0500 Received: by mail-ee0-f53.google.com with SMTP id e53so2672707eek.12 for ; Sun, 10 Feb 2013 05:21:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=5sbAdidry1yMCSpsq+P+MhcnHJtkfyYncq2lbXGFDaU=; b=ciWGB7NGl3rSlkGFyBC9oEcwO/sZrNED065l0P2ozpU9cWYPcpJWpT9+exfizGIALK 2jQ9V9dr+7vNhcyT37oPuostBBAM0xXakvHRvnTIcjhPVqkpxKumsw5a/ADqZcgpttxn RBl08NhxIABI2H7Lvxkngf0wAuPqBf6OGqrO9jhs02ne2pSg3luyn+QXWOIbdUC60Yxd r+PHN9tA68jB7MGva2+n5UlweNkBNoMJ+aiF6xrDcLN3CgQ/Psh5RulloQ70aSxNbueF tEAjaRrtWCI5cl/bJbzPzpAzYgnpSu5P4/mvnZxxPIwrRWKXSkPnpBpy246zDs5M/Xbf v4pw== X-Received: by 10.14.218.71 with SMTP id j47mr38450443eep.28.1360502466841; Sun, 10 Feb 2013 05:21:06 -0800 (PST) Received: from flatron.tomeq (87-207-52-162.dynamic.chello.pl. [87.207.52.162]) by mx.google.com with ESMTPS id 44sm57225596eek.5.2013.02.10.05.21.04 (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sun, 10 Feb 2013 05:21:05 -0800 (PST) From: Tomasz Figa To: linux-arm-kernel@lists.infradead.org Cc: linux-samsung-soc@vger.kernel.org, Kukjin Kim , kyungmin.park@samsung.com, linux@simtec.co.uk, broonie@opensource.wolfsonmicro.com, kwangwoo.lee@gmail.com, jacmet@sunsite.dk, augulis.darius@gmail.com, mcuelenaere@gmail.com, linux@arm.linux.org.uk, Sylwester Nawrocki , arhuaco@freaks-unidos.net, buserror@gmail.com, christer@weinigel.se, guillaume.gourat@nexvision.tv, jekhor@gmail.com, danders@amltd.com, bhmin@samsung.com, ghcstop@gmail.com, Tomasz Figa , devicetree-discuss@lists.ozlabs.org Subject: [PATCH 12/12] clocksource: samsung-time: Add Device Tree support Date: Sun, 10 Feb 2013 14:20:23 +0100 Message-Id: <1360502423-2246-13-git-send-email-tomasz.figa@gmail.com> X-Mailer: git-send-email 1.8.1.2 In-Reply-To: <1360502423-2246-1-git-send-email-tomasz.figa@gmail.com> References: <1360502423-2246-1-git-send-email-tomasz.figa@gmail.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org This patch adds support for parsing all platform-specific data from Device Tree and instantiation using clocksource_of_init to samsung-time clocksource driver. Cc: devicetree-discuss@lists.ozlabs.org Signed-off-by: Tomasz Figa --- .../devicetree/bindings/arm/samsung-timer.txt | 32 +++++++ drivers/clocksource/samsung-time.c | 102 ++++++++++++++++++++- 2 files changed, 131 insertions(+), 3 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/samsung-timer.txt diff --git a/Documentation/devicetree/bindings/arm/samsung-timer.txt b/Documentation/devicetree/bindings/arm/samsung-timer.txt new file mode 100644 index 0000000..8eb7030 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/samsung-timer.txt @@ -0,0 +1,32 @@ +* Samsung PWM timer + +Samsung SoCs contain PWM timer blocks which can be used for system clock source +and clock event timers. + +Be aware that this configuration is supported only on uniprocessor platforms. +For SMP SoCs, SMP-aware timers should be used, like MCT. + +Required properties: +- compatible : should be one of following: + samsung,s3c24xx-pwm-timer - for 16-bit timers present on S3C24xx + samsung,s3c64xx-pwm-timer - for 32-bit timers present on S3C64xx and newer +- reg: base address and size of register area +- interrupts: interrupt list for all five PWM timers. +- samsung,source-timer: index of timer to be used as clocksource +- samsung,event-timer: index of timer to be used as clock event + +Optional properties: +- samsung,prescale: PWM prescaler divisor (from 1 to 256) +- samsung,divisor: PWM main divider divisor (1, 2, 4, 8 or 16) + +Example: + timer@7f006000 { + compatible = "samsung,s3c64xx-pwm-timer"; + reg = <0x7f006000 0x1000>; + interrupt-parent = <&vic0>; + interrupts = <23>, <24>, <25>, <27>, <28>; + samsung,source-timer = <4>; + samsung,event-timer = <3>; + samsung,prescale = <2>; + samsung,divisor = <1>; + }; diff --git a/drivers/clocksource/samsung-time.c b/drivers/clocksource/samsung-time.c index 19a1c8a..63d2992 100644 --- a/drivers/clocksource/samsung-time.c +++ b/drivers/clocksource/samsung-time.c @@ -14,6 +14,9 @@ #include #include #include +#include +#include +#include #include #include @@ -479,9 +482,11 @@ static void __init samsung_timer_resources(void) unsigned long source_id = timer_source.source_id; char devname[15]; - timer_base = ioremap_nocache(timer_variant.reg_base, SZ_4K); - if (!timer_base) - panic("failed to map timer registers"); + if (!timer_base) { + timer_base = ioremap_nocache(timer_variant.reg_base, SZ_4K); + if (!timer_base) + panic("failed to map timer registers"); + } timerclk = clk_get(NULL, "timers"); if (IS_ERR(timerclk)) @@ -514,8 +519,92 @@ static void __init samsung_timer_resources(void) clk_enable(tin_source); } +enum { + TYPE_S3C24XX, + TYPE_S3C64XX, +}; + +#ifdef CONFIG_OF +static const struct of_device_id samsung_timer_ids[] = { + { .compatible = "samsung,s3c24xx-pwm-timer", + .data = (void *)TYPE_S3C24XX, }, + { .compatible = "samsung,s3c64xx-pwm-timer", + .data = (void *)TYPE_S3C64XX, }, + {}, +}; + +static void samsung_timer_parse_dt(struct device_node *np, + const struct of_device_id *match) +{ + int i; + u32 val; + + if (of_property_read_u32(np, "samsung,source-timer", &val)) + panic("no samsung,source-timer property provided"); + if (val > ARRAY_SIZE(timer_variant.irqs)) + panic("samsung,source-timer property out of range"); + timer_source.source_id = val; + + if (of_property_read_u32(np, "samsung,event-timer", &val)) + panic("no samsung,event-timer property provided"); + if (val > ARRAY_SIZE(timer_variant.irqs)) + panic("samsung,event-timer property out of range"); + timer_source.event_id = val; + + timer_base = of_iomap(np, 0); + if (!timer_base) + panic("failed to map timer registers"); + + for (i = 0; i < ARRAY_SIZE(timer_variant.irqs); ++i) + timer_variant.irqs[i] = irq_of_parse_and_map(np, i); + + if (!timer_variant.irqs[timer_source.event_id]) + panic("no clock event irq provided"); + + switch ((unsigned int)match->data) { + case TYPE_S3C24XX: + timer_variant.bits = 16; + timer_variant.prescale = 25; + timer_variant.prescale = 50; + timer_variant.has_tint_cstat = false; + break; + case TYPE_S3C64XX: + timer_variant.bits = 32; + timer_variant.prescale = 2; + timer_variant.divisor = 2; + timer_variant.has_tint_cstat = true; + break; + } + + if (!of_property_read_u32(np, "samsung,prescale", &val)) { + if (val < 1 || val > 256) + panic("prescale must be from 1 to 256 range"); + timer_variant.prescale = val; + } + + if (!of_property_read_u32(np, "samsung,divisor", &val)) { + if (val > 16 || (1 << (fls(val) - 1)) != val) + panic("divsor must be 1, 2, 4, 8 or 16"); + timer_variant.divisor = timer_variant.prescale * val; + } +} +#endif + void __init samsung_timer_init(void) { +#ifdef CONFIG_OF + struct device_node *np; + const struct of_device_id *match; + + if (of_have_populated_dt()) { + np = of_find_matching_node_and_match(NULL, + samsung_timer_ids, &match); + if (!np) + panic("timer node not found"); + + samsung_timer_parse_dt(np, match); + } +#endif if (!timer_source.source_id && !timer_source.event_id) panic("timer sources not set (see samsung_set_timer_source)!\n"); @@ -526,3 +615,10 @@ void __init samsung_timer_init(void) samsung_clockevent_init(); samsung_clocksource_init(); } + +#ifdef CONFIG_OF +CLOCKSOURCE_OF_DECLARE(s3c24xx_timer, + "samsung,s3c24xx-pwm-timer", samsung_timer_init) +CLOCKSOURCE_OF_DECLARE(s3c64xx_timer, + "samsung,s3c64xx-pwm-timer", samsung_timer_init) +#endif