From patchwork Sat Feb 16 16:44:03 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Figa X-Patchwork-Id: 2152001 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 9F3AFDF2A1 for ; Sat, 16 Feb 2013 16:45:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753720Ab3BPQpO (ORCPT ); Sat, 16 Feb 2013 11:45:14 -0500 Received: from mail-ee0-f53.google.com ([74.125.83.53]:57385 "EHLO mail-ee0-f53.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753710Ab3BPQpN (ORCPT ); Sat, 16 Feb 2013 11:45:13 -0500 Received: by mail-ee0-f53.google.com with SMTP id e53so2312281eek.40 for ; Sat, 16 Feb 2013 08:45:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=19fNDP85il0TkS6oB9J6Fc0yKj7ybvsNMX7NIw7t5Hc=; b=xcS22A6kAFKM6y0L6sYsnH5K2SEnTrhokFSqBhdqdqo10CKSpMlUP51cXtG/zNRPAC 6Mb+cAW2vvY81FjSQ09NnniDw18kMR+tiI8Toi6U6e3Gbpc4K35TCHDYX0WrwRSsupq2 77vsjVb7N8U2DBAKifD7+7KatMLSGTUZovUQX0ebU5gutgI9bmYY+WNv/E3V5RqGmA22 9MZRBjGPtgDItiZpqfb4QAbMwTSvQdOabqP3boy/TVoWWZXKXM34QzV+VeN3dE3HD6bO 23Syzo7rXooL3U4sKE6in9zeki04kacTLFTZD+AuPVxY9pwiF7HXXKV9kO3fhgzsWyDB 2HRQ== X-Received: by 10.14.3.133 with SMTP id 5mr22043917eeh.43.1361033111726; Sat, 16 Feb 2013 08:45:11 -0800 (PST) Received: from flatron.tomeq (87-207-52-162.dynamic.chello.pl. [87.207.52.162]) by mx.google.com with ESMTPS id f47sm43609113eep.13.2013.02.16.08.45.09 (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sat, 16 Feb 2013 08:45:10 -0800 (PST) From: Tomasz Figa To: linux-arm-kernel@lists.infradead.org Cc: linux-samsung-soc@vger.kernel.org, Kukjin Kim , kyungmin.park@samsung.com, linux@simtec.co.uk, broonie@opensource.wolfsonmicro.com, kwangwoo.lee@gmail.com, jacmet@sunsite.dk, augulis.darius@gmail.com, mcuelenaere@gmail.com, linux@arm.linux.org.uk, Sylwester Nawrocki , buserror@gmail.com, christer@weinigel.se, jekhor@gmail.com, ghcstop@gmail.com, Mark Rutland , Tomasz Figa Subject: [PATCH v2 11/12] ARM: SAMSUNG: Remove unused PWM timer IRQ chip code Date: Sat, 16 Feb 2013 17:44:03 +0100 Message-Id: <1361033044-27629-12-git-send-email-tomasz.figa@gmail.com> X-Mailer: git-send-email 1.8.1.2 In-Reply-To: <1361033044-27629-1-git-send-email-tomasz.figa@gmail.com> References: <1361033044-27629-1-git-send-email-tomasz.figa@gmail.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org As the need for an IRQ chip handling PWM timer interrupt chaining is gone now, this patch removes all the code made unnecessary. Signed-off-by: Tomasz Figa --- arch/arm/Kconfig | 1 - arch/arm/mach-s3c64xx/common.c | 1 - arch/arm/plat-samsung/Kconfig | 6 -- arch/arm/plat-samsung/Makefile | 1 - arch/arm/plat-samsung/include/plat/irq-vic-timer.h | 13 --- arch/arm/plat-samsung/irq-vic-timer.c | 98 ---------------------- arch/arm/plat-samsung/s5p-irq.c | 1 - 7 files changed, 121 deletions(-) delete mode 100644 arch/arm/plat-samsung/include/plat/irq-vic-timer.h delete mode 100644 arch/arm/plat-samsung/irq-vic-timer.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 8b72d23..2c85d52 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -778,7 +778,6 @@ config ARCH_S3C64XX select S3C_GPIO_TRACK select SAMSUNG_CLKSRC select SAMSUNG_GPIOLIB_4BIT - select SAMSUNG_IRQ_VIC_TIMER select USB_ARCH_HAS_OHCI help Samsung S3C64XX series based systems diff --git a/arch/arm/mach-s3c64xx/common.c b/arch/arm/mach-s3c64xx/common.c index ce1b1da..099966d 100644 --- a/arch/arm/mach-s3c64xx/common.c +++ b/arch/arm/mach-s3c64xx/common.c @@ -41,7 +41,6 @@ #include #include #include -#include #include #include #include diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig index 07ae984..6967144 100644 --- a/arch/arm/plat-samsung/Kconfig +++ b/arch/arm/plat-samsung/Kconfig @@ -27,7 +27,6 @@ config PLAT_S5P select S5P_GPIO_DRVSTR select SAMSUNG_CLKSRC select SAMSUNG_GPIOLIB_4BIT - select SAMSUNG_IRQ_VIC_TIMER help Base platform code for Samsung's S5P series SoC. @@ -87,11 +86,6 @@ config S5P_CLOCK # options for IRQ support -config SAMSUNG_IRQ_VIC_TIMER - bool - help - Internal configuration to build the VIC timer interrupt code. - config S5P_IRQ def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS) help diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile index 87494e1..ae2a0fd 100644 --- a/arch/arm/plat-samsung/Makefile +++ b/arch/arm/plat-samsung/Makefile @@ -19,7 +19,6 @@ obj-$(CONFIG_SAMSUNG_CLOCK) += pwm-clock.o obj-$(CONFIG_SAMSUNG_CLKSRC) += clock-clksrc.o obj-$(CONFIG_S5P_CLOCK) += s5p-clock.o -obj-$(CONFIG_SAMSUNG_IRQ_VIC_TIMER) += irq-vic-timer.o obj-$(CONFIG_S5P_IRQ) += s5p-irq.o obj-$(CONFIG_S5P_EXT_INT) += s5p-irq-eint.o obj-$(CONFIG_S5P_GPIO_INT) += s5p-irq-gpioint.o diff --git a/arch/arm/plat-samsung/include/plat/irq-vic-timer.h b/arch/arm/plat-samsung/include/plat/irq-vic-timer.h deleted file mode 100644 index 5b9c42f..0000000 --- a/arch/arm/plat-samsung/include/plat/irq-vic-timer.h +++ /dev/null @@ -1,13 +0,0 @@ -/* arch/arm/plat-samsung/include/plat/irq-vic-timer.h - * - * Copyright (c) 2010 Simtec Electronics - * Ben Dooks - * - * Header file for Samsung SoC IRQ VIC timer - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -extern void s3c_init_vic_timer_irq(unsigned int num, unsigned int timer_irq); diff --git a/arch/arm/plat-samsung/irq-vic-timer.c b/arch/arm/plat-samsung/irq-vic-timer.c deleted file mode 100644 index f980cf3..0000000 --- a/arch/arm/plat-samsung/irq-vic-timer.c +++ /dev/null @@ -1,98 +0,0 @@ -/* arch/arm/plat-samsung/irq-vic-timer.c - * originally part of arch/arm/plat-s3c64xx/irq.c - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Ben Dooks - * http://armlinux.simtec.co.uk/ - * - * S3C64XX - Interrupt handling - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include - -#include -#include -#include -#include - -#include - -static void s3c_irq_demux_vic_timer(unsigned int irq, struct irq_desc *desc) -{ - struct irq_chip *chip = irq_get_chip(irq); - chained_irq_enter(chip, desc); - generic_handle_irq((int)desc->irq_data.handler_data); - chained_irq_exit(chip, desc); -} - -/* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */ -static void s3c_irq_timer_ack(struct irq_data *d) -{ - struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); - u32 mask = (1 << 5) << (d->irq - gc->irq_base); - - irq_reg_writel(mask | gc->mask_cache, gc->reg_base); -} - -/** - * s3c_init_vic_timer_irq() - initialise timer irq chanined off VIC.\ - * @num: Number of timers to initialize - * @timer_irq: Base IRQ number to be used for the timers. - * - * Register the necessary IRQ chaining and support for the timer IRQs - * chained of the VIC. - */ -void __init s3c_init_vic_timer_irq(unsigned int num, unsigned int timer_irq) -{ - unsigned int pirq[5] = { IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC, - IRQ_TIMER3_VIC, IRQ_TIMER4_VIC }; - struct irq_chip_generic *s3c_tgc; - struct irq_chip_type *ct; - unsigned int i; - -#ifdef CONFIG_ARCH_EXYNOS - if (soc_is_exynos5250()) { - pirq[0] = EXYNOS5_IRQ_TIMER0_VIC; - pirq[1] = EXYNOS5_IRQ_TIMER1_VIC; - pirq[2] = EXYNOS5_IRQ_TIMER2_VIC; - pirq[3] = EXYNOS5_IRQ_TIMER3_VIC; - pirq[4] = EXYNOS5_IRQ_TIMER4_VIC; - } else { - pirq[0] = EXYNOS4_IRQ_TIMER0_VIC; - pirq[1] = EXYNOS4_IRQ_TIMER1_VIC; - pirq[2] = EXYNOS4_IRQ_TIMER2_VIC; - pirq[3] = EXYNOS4_IRQ_TIMER3_VIC; - pirq[4] = EXYNOS4_IRQ_TIMER4_VIC; - } -#endif - s3c_tgc = irq_alloc_generic_chip("s3c-timer", 1, timer_irq, - S3C64XX_TINT_CSTAT, handle_level_irq); - - if (!s3c_tgc) { - pr_err("%s: irq_alloc_generic_chip for IRQ %d failed\n", - __func__, timer_irq); - return; - } - - ct = s3c_tgc->chip_types; - ct->chip.irq_mask = irq_gc_mask_clr_bit; - ct->chip.irq_unmask = irq_gc_mask_set_bit; - ct->chip.irq_ack = s3c_irq_timer_ack; - irq_setup_generic_chip(s3c_tgc, IRQ_MSK(num), IRQ_GC_INIT_MASK_CACHE, - IRQ_NOREQUEST | IRQ_NOPROBE, 0); - /* Clear the upper bits of the mask_cache*/ - s3c_tgc->mask_cache &= 0x1f; - - for (i = 0; i < num; i++, timer_irq++) { - irq_set_chained_handler(pirq[i], s3c_irq_demux_vic_timer); - irq_set_handler_data(pirq[i], (void *)timer_irq); - } -} diff --git a/arch/arm/plat-samsung/s5p-irq.c b/arch/arm/plat-samsung/s5p-irq.c index a14d8e9..f6404f7 100644 --- a/arch/arm/plat-samsung/s5p-irq.c +++ b/arch/arm/plat-samsung/s5p-irq.c @@ -19,7 +19,6 @@ #include #include #include -#include void __init s5p_init_irq(u32 *vic, u32 num_vic) {