From patchwork Mon Feb 18 08:13:43 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Abraham X-Patchwork-Id: 2156141 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 5ECECDF25A for ; Mon, 18 Feb 2013 08:14:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753609Ab3BRIOe (ORCPT ); Mon, 18 Feb 2013 03:14:34 -0500 Received: from mail-pb0-f49.google.com ([209.85.160.49]:63323 "EHLO mail-pb0-f49.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753527Ab3BRIOd (ORCPT ); Mon, 18 Feb 2013 03:14:33 -0500 Received: by mail-pb0-f49.google.com with SMTP id xa12so1550526pbc.8 for ; Mon, 18 Feb 2013 00:14:32 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:x-gm-message-state; bh=WTY5ZycoAXOXHp1mLa7Vrj/+NCWBJubAclPYFCnQVms=; b=L567RffzUoLxyhxRpDWbRQTAR/JwR7bCriVwLTwabLmecb5rU6E0PHPVfjIctbKfmu 7vvU+94dsbAQcbgrm5Vo1GiTYZ9NmyxntC6p0q8yty53yrXh9So8z/j0HqbuCmcX0Srm isgnJnrFHZCJ0VayRpzYYFHa71pgqUKOrNoM07IK3g8+Bxy9GMZH12DioDu88lEpwRor YysxGUKO7ViXnxhws6dg1hKbfTPiPhyWfR9bELzialaCghLuoMG8uEX5uYRpodCURTp7 coT830HNfLalRlSMynClJHfukIYgX1YSU/VTKLaC+I7BFIuZf9/nF2CdRcv+15cEouku Dhzg== X-Received: by 10.68.116.169 with SMTP id jx9mr27708173pbb.94.1361175272891; Mon, 18 Feb 2013 00:14:32 -0800 (PST) Received: from localhost.localdomain ([115.113.119.130]) by mx.google.com with ESMTPS id 1sm2182920pba.32.2013.02.18.00.14.29 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 18 Feb 2013 00:14:32 -0800 (PST) From: Thomas Abraham To: devicetree-discuss@lists.ozlabs.org, linux-samsung-soc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, kgene.kim@samsung.com, t.figa@samsung.com, chaos.youn@samsung.com, sylvester.nawrocki@gmail.com, swarren@nvidia.com Subject: [PATCH 5/7] ARM: dts: add mct device tree node for all supported Exynos SoC's Date: Mon, 18 Feb 2013 13:43:43 +0530 Message-Id: <1361175225-19282-6-git-send-email-thomas.abraham@linaro.org> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1361175225-19282-1-git-send-email-thomas.abraham@linaro.org> References: <1361175225-19282-1-git-send-email-thomas.abraham@linaro.org> X-Gm-Message-State: ALoCoQnNe5AUUr+l1e4ZV3jLNLDU0mh+3NmMirA5e/7OWhV0/JYkKiFMAde4RJMWQJSvLTIerIR1 Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Add MCT device tree node for Exynos4210, Exynos4212, Exynos4412 and Exynos5250. Cc: Changhwan Youn Signed-off-by: Thomas Abraham Reviewed-by: Stephen Warren --- arch/arm/boot/dts/exynos4210.dtsi | 22 ++++++++++++++++++++++ arch/arm/boot/dts/exynos4212.dtsi | 22 ++++++++++++++++++++++ arch/arm/boot/dts/exynos4412.dtsi | 24 ++++++++++++++++++++++++ arch/arm/boot/dts/exynos5250.dtsi | 22 ++++++++++++++++++++++ 4 files changed, 90 insertions(+), 0 deletions(-) diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index 79ba247..0e16a34 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -47,6 +47,28 @@ <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>; }; + mct@10050000 { + compatible = "samsung,exynos4210-mct"; + reg = <0x10050000 0x800>; + interrupt-controller; + #interrups-cells = <2>; + interrupt-parent = <&mct_map>; + interrupts = <0 0>, <1 0>, <2 0>, <3 0>, + <4 0>, <5 0>; + + mct_map: mct-map { + #interrupt-cells = <2>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-map = <0x0 0 &gic 0 57 0>, + <0x1 0 &gic 0 69 0>, + <0x2 0 &combiner 12 6>, + <0x3 0 &combiner 12 7>, + <0x4 0 &gic 0 42 0>, + <0x5 0 &gic 0 48 0>; + }; + }; + pmu { compatible = "arm,cortex-a9-pmu"; interrupt-parent = <&combiner>; diff --git a/arch/arm/boot/dts/exynos4212.dtsi b/arch/arm/boot/dts/exynos4212.dtsi index c6ae200..36d4299 100644 --- a/arch/arm/boot/dts/exynos4212.dtsi +++ b/arch/arm/boot/dts/exynos4212.dtsi @@ -25,4 +25,26 @@ gic:interrupt-controller@10490000 { cpu-offset = <0x8000>; }; + + mct@10050000 { + compatible = "samsung,exynos4412-mct"; + reg = <0x10050000 0x800>; + interrupt-controller; + #interrups-cells = <2>; + interrupt-parent = <&mct_map>; + interrupts = <0 0>, <1 0>, <2 0>, <3 0>, + <4 0>, <5 0>; + + mct_map: mct-map { + #interrupt-cells = <2>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-map = <0x0 0 &gic 0 57 0>, + <0x1 0 &combiner 12 5>, + <0x2 0 &combiner 12 6>, + <0x3 0 &combiner 12 7>, + <0x4 0 &gic 1 12 0>, + <0x5 0 &gic 1 12 0>; + }; + }; }; diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi index d7dfe31..821c9fd 100644 --- a/arch/arm/boot/dts/exynos4412.dtsi +++ b/arch/arm/boot/dts/exynos4412.dtsi @@ -25,4 +25,28 @@ gic:interrupt-controller@10490000 { cpu-offset = <0x4000>; }; + + mct@10050000 { + compatible = "samsung,exynos4412-mct"; + reg = <0x10050000 0x800>; + interrupt-controller; + #interrups-cells = <2>; + interrupt-parent = <&mct_map>; + interrupts = <0 0>, <1 0>, <2 0>, <3 0>, + <4 0>, <5 0>, <6 0>, <7 0>; + + mct_map: mct-map { + #interrupt-cells = <2>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-map = <0x0 0 &gic 0 57 0>, + <0x1 0 &combiner 12 5>, + <0x2 0 &combiner 12 6>, + <0x3 0 &combiner 12 7>, + <0x4 0 &gic 1 12 0>, + <0x5 0 &gic 1 12 0>, + <0x6 0 &gic 1 12 0>, + <0x7 0 &gic 1 12 0>; + }; + }; }; diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 7c3d07a..8d8b5a0 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -79,6 +79,28 @@ <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>; }; + mct@101C0000 { + compatible = "samsung,exynos4210-mct"; + reg = <0x101C0000 0x800>; + interrupt-controller; + #interrups-cells = <2>; + interrupt-parent = <&mct_map>; + interrupts = <0 0>, <1 0>, <2 0>, <3 0>, + <4 0>, <5 0>; + + mct_map: mct-map { + #interrupt-cells = <2>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-map = <0x0 0 &combiner 23 3>, + <0x1 0 &combiner 23 4>, + <0x2 0 &combiner 25 2>, + <0x3 0 &combiner 25 3>, + <0x4 0 &gic 0 120 0>, + <0x5 0 &gic 0 121 0>; + }; + }; + pmu { compatible = "arm,cortex-a15-pmu"; interrupt-parent = <&combiner>;