@@ -69,6 +69,12 @@
};
};
+ clock: clock-controller@0x10030000 {
+ compatible = "samsung,exynos4210-clock";
+ reg = <0x10030000 0x20000>;
+ #clock-cells = <1>;
+ };
+
pmu {
compatible = "arm,cortex-a9-pmu";
interrupt-parent = <&combiner>;
@@ -36,6 +36,12 @@
<0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>;
};
+ clock: clock-controller@0x10030000 {
+ compatible = "samsung,exynos4412-clock";
+ reg = <0x10030000 0x20000>;
+ #clock-cells = <1>;
+ };
+
pinctrl_0: pinctrl@11400000 {
compatible = "samsung,exynos4x12-pinctrl";
reg = <0x11400000 0x1000>;
@@ -60,6 +60,12 @@
compatible = "samsung,exynos4210-pd";
reg = <0x10044040 0x20>;
};
+
+ clock: clock-controller@0x10010000 {
+ compatible = "samsung,exynos5250-clock";
+ reg = <0x10010000 0x30000>;
+ #clock-cells = <1>;
+ };
gic:interrupt-controller@10481000 {
compatible = "arm,cortex-a9-gic";
@@ -16,6 +16,12 @@
interrupt-parent = <&gic>;
+ clock: clock-controller@0x160000 {
+ compatible = "samsung,exynos5440-clock";
+ reg = <0x160000 0x1000>;
+ #clock-cells = <1>;
+ };
+
gic:interrupt-controller@2E0000 {
compatible = "arm,cortex-a15-gic";
#interrupt-cells = <3>;
Add clock controller nodes for Exynos4210, Exynos4x12, Exynos5250 and Exynos5440 SoC. Cc: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> --- arch/arm/boot/dts/exynos4210.dtsi | 6 ++++++ arch/arm/boot/dts/exynos4x12.dtsi | 6 ++++++ arch/arm/boot/dts/exynos5250.dtsi | 6 ++++++ arch/arm/boot/dts/exynos5440.dtsi | 6 ++++++ 4 files changed, 24 insertions(+), 0 deletions(-)