From patchwork Wed Mar 27 11:02:38 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Figa X-Patchwork-Id: 2349361 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id D86FC3FC8C for ; Wed, 27 Mar 2013 11:03:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751777Ab3C0LDp (ORCPT ); Wed, 27 Mar 2013 07:03:45 -0400 Received: from mailout4.samsung.com ([203.254.224.34]:43699 "EHLO mailout4.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751774Ab3C0LDo (ORCPT ); Wed, 27 Mar 2013 07:03:44 -0400 Received: from epcpsbgm2.samsung.com (epcpsbgm2 [203.254.230.27]) by mailout4.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MKB00GERG259SR0@mailout4.samsung.com> for linux-samsung-soc@vger.kernel.org; Wed, 27 Mar 2013 20:03:43 +0900 (KST) X-AuditID: cbfee61b-b7f076d0000034b6-3e-5152d20f99e6 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id FC.92.13494.F02D2515; Wed, 27 Mar 2013 20:03:43 +0900 (KST) Received: from mcdsrvbld02.digital.local ([106.116.37.23]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MKB00EJ7G19TVH0@mmp2.samsung.com>; Wed, 27 Mar 2013 20:03:43 +0900 (KST) From: Tomasz Figa To: linux-samsung-soc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, kyungmin.park@samsung.com, kgene.kim@samsung.com, m.szyprowski@samsung.com, t.figa@samsung.com, s.nawrocki@samsung.com, mturquette@linaro.org, thomas.abraham@linaro.org, a.hajda@samsung.com, l.majewski@samsung.com Subject: [PATCH 01/21] clk: samsung: exynos4: Correct sclk_mfc clock definition Date: Wed, 27 Mar 2013 12:02:38 +0100 Message-id: <1364382178-25248-2-git-send-email-t.figa@samsung.com> X-Mailer: git-send-email 1.7.10 In-reply-to: <1364382178-25248-1-git-send-email-t.figa@samsung.com> References: <1364382178-25248-1-git-send-email-t.figa@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprPLMWRmVeSWpSXmKPExsVy+t9jQV3+S0GBBhueqVvcWneO1aJ3wVU2 i7NNb9gt3jzczGix6fE1VosZ5/cxWaw9cpfd4umEi2wWh9+0s1qsn/GaxeLYjCWMDtwed67t YfPYvKTeo2/LKkaPz5vkAliiuGxSUnMyy1KL9O0SuDJeL33LXPBPoOLYMfsGxl6+LkZODgkB E4nzG7+xQthiEhfurWfrYuTiEBKYzigxZep2Rgini0mifetasCo2ATWJzw2P2EBsEQFVic9t C9hBbGaBViaJhectuxg5OIQF/CU+bYkCCbMAlSz72c0MEuYVcJLY/90QYpe8xNP7fWBTOAWc Jd5NP8IIYgsBldx485R1AiPvAkaGVYyiqQXJBcVJ6blGesWJucWleel6yfm5mxjBwfZMegfj qgaLQ4wCHIxKPLwO/wIDhVgTy4orcw8xSnAwK4nwGh0IChTiTUmsrEotyo8vKs1JLT7EKM3B oiTOe7DVOlBIID2xJDU7NbUgtQgmy8TBKdXAGLtK13vu9g2zzhhfWzyJ47jOnT7OheGn5gbb 3PsSMev0g7kbdpXZZN98Krdz4RXZnYsDuO+9rRRdtOG42v9PfbefRnLczta+who64cvnhA1/ ly47uHzeAfWMi94fe5O/HxB8+DGT+e9c2d1XFy6KZ522yGFdybQJPZ3h38S/adwTzmXJmDhr WeNNJZbijERDLeai4kQAsm7n8DICAAA= Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org From: Sylwester Nawrocki This clock must be exported to allow lookup using device tree. Signed-off-by: Sylwester Nawrocki Signed-off-by: Tomasz Figa Signed-off-by: Kyungmin Park --- Documentation/devicetree/bindings/clock/exynos4-clock.txt | 2 +- drivers/clk/samsung/clk-exynos4.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/exynos4-clock.txt b/Documentation/devicetree/bindings/clock/exynos4-clock.txt index e874add..8b58232 100644 --- a/Documentation/devicetree/bindings/clock/exynos4-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos4-clock.txt @@ -91,7 +91,7 @@ Exynos4 SoC and this is specified where applicable. sclk_i2s1 167 sclk_i2s2 168 sclk_mipihsi 169 Exynos4412 - + sclk_mfc 170 [Peripheral Clock Gates] diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c index e1bb81a..44a99b5 100644 --- a/drivers/clk/samsung/clk-exynos4.c +++ b/drivers/clk/samsung/clk-exynos4.c @@ -122,7 +122,7 @@ enum exynos4_clks { sclk_sata, sclk_uart0, sclk_uart1, sclk_uart2, sclk_uart3, sclk_uart4, sclk_audio1, sclk_audio2, sclk_spdif, sclk_spi0, sclk_spi1, sclk_spi2, sclk_slimbus, sclk_fimd1, sclk_mipi1, sclk_pcm1, sclk_pcm2, sclk_i2s1, - sclk_i2s2, sclk_mipihsi, + sclk_i2s2, sclk_mipihsi, sclk_mfc, /* gate clocks */ fimc0 = 256, fimc1, fimc2, fimc3, csis0, csis1, jpeg, smmu_fimc0, @@ -355,7 +355,7 @@ struct samsung_div_clock exynos4_div_clks[] __initdata = { DIV(none, "div_cam1", "mout_cam1", DIV_CAM, 20, 4), DIV(none, "div_csis0", "mout_csis0", DIV_CAM, 24, 4), DIV(none, "div_csis1", "mout_csis1", DIV_CAM, 28, 4), - DIV(none, "div_mfc", "mout_mfc", DIV_MFC, 0, 4), + DIV(sclk_mfc, "sclk_mfc", "mout_mfc", DIV_MFC, 0, 4), DIV(none, "div_g3d", "mout_g3d", DIV_G3D, 0, 4), DIV(none, "div_fimd0", "mout_fimd0", DIV_LCD0, 0, 4), DIV(none, "div_mipi0", "mout_mipi0", DIV_LCD0, 16, 4),