From patchwork Tue Apr 16 10:05:18 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sachin Kamat X-Patchwork-Id: 2448701 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 111C1DF230 for ; Tue, 16 Apr 2013 10:17:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S964953Ab3DPKRl (ORCPT ); Tue, 16 Apr 2013 06:17:41 -0400 Received: from mail-pd0-f175.google.com ([209.85.192.175]:42434 "EHLO mail-pd0-f175.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S964932Ab3DPKRi (ORCPT ); Tue, 16 Apr 2013 06:17:38 -0400 Received: by mail-pd0-f175.google.com with SMTP id g10so213482pdj.6 for ; Tue, 16 Apr 2013 03:17:38 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:x-gm-message-state; bh=HqPnLCEUVGbTtECsQLPwhsfwnWGc7ruE1LUB8GEy/wU=; b=WlkcpoKZuRGK4/I6VdJw5K2PoEBQPL7Y0suSW+kzGlxs5CuJI3rqTMq1TPSB9D16Ab FMMyWRLJSit2s928dVrCjhlWdnDhwGt0TwP7nZXJcdB4Zz0FG0CVmHl3stvDMY4KHtkX 3BGcYb2cEEBzzLMjzsf5EzgVEzEWZp+Gc1TIZ+Gls0c2LGFpW4y4DCLmYW4I7wrWlx1M fkKK+jS6LDFCBgDC1f3CtI8IwSobkpzsyQV+4SRHImMInYEWC7ZK7DJ3pIMtVDmuRNSS rng06EtEykFM/ZTw4y3VWUKHsjMihWnFslzTi+c5chfDTQkZ9KMhGT//yHA8hqcvUeSl Kclw== X-Received: by 10.68.247.202 with SMTP id yg10mr2280382pbc.103.1366107458291; Tue, 16 Apr 2013 03:17:38 -0700 (PDT) Received: from linaro.sisodomain.com ([115.113.119.130]) by mx.google.com with ESMTPS id ky10sm2071764pab.23.2013.04.16.03.17.34 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 16 Apr 2013 03:17:37 -0700 (PDT) From: Sachin Kamat To: linux-samsung-soc@vger.kernel.org Cc: kgene.kim@samsung.com, mturquette@linaro.org, thomas.abraham@linaro.org, sachin.kamat@linaro.org, patches@linaro.org Subject: [PATCH 2/3] clk: exynos5250: Staticize local symbols Date: Tue, 16 Apr 2013 15:35:18 +0530 Message-Id: <1366106719-26342-2-git-send-email-sachin.kamat@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1366106719-26342-1-git-send-email-sachin.kamat@linaro.org> References: <1366106719-26342-1-git-send-email-sachin.kamat@linaro.org> X-Gm-Message-State: ALoCoQmTvtiL3x1oB5/htJ2IY9AbiHNitu1lYDNz0d0ZPMZa4Dij2CIPtAyD2Hyy9o+dVzv55e3U Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org These symbols are used only in this file and hence should be static. Signed-off-by: Sachin Kamat Acked-by: Kukjin Kim --- drivers/clk/samsung/clk-exynos5250.c | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c index 7290faa..9cdee2b 100644 --- a/drivers/clk/samsung/clk-exynos5250.c +++ b/drivers/clk/samsung/clk-exynos5250.c @@ -191,24 +191,27 @@ PNAME(mout_spdif_p) = { "sclk_audio0", "sclk_audio1", "sclk_audio2", "spdif_extclk" }; /* fixed rate clocks generated outside the soc */ -struct samsung_fixed_rate_clock exynos5250_fixed_rate_ext_clks[] __initdata = { +static struct +samsung_fixed_rate_clock exynos5250_fixed_rate_ext_clks[] __initdata = { FRATE(fin_pll, "fin_pll", NULL, CLK_IS_ROOT, 0), }; /* fixed rate clocks generated inside the soc */ -struct samsung_fixed_rate_clock exynos5250_fixed_rate_clks[] __initdata = { +static struct +samsung_fixed_rate_clock exynos5250_fixed_rate_clks[] __initdata = { FRATE(none, "sclk_hdmiphy", NULL, CLK_IS_ROOT, 24000000), FRATE(none, "sclk_hdmi27m", NULL, CLK_IS_ROOT, 27000000), FRATE(none, "sclk_dptxphy", NULL, CLK_IS_ROOT, 24000000), FRATE(none, "sclk_uhostphy", NULL, CLK_IS_ROOT, 48000000), }; -struct samsung_fixed_factor_clock exynos5250_fixed_factor_clks[] __initdata = { +static struct +samsung_fixed_factor_clock exynos5250_fixed_factor_clks[] __initdata = { FFACTOR(none, "fout_mplldiv2", "fout_mpll", 1, 2, 0), FFACTOR(none, "fout_bplldiv2", "fout_bpll", 1, 2, 0), }; -struct samsung_mux_clock exynos5250_mux_clks[] __initdata = { +static struct samsung_mux_clock exynos5250_mux_clks[] __initdata = { MUX(none, "mout_apll", mout_apll_p, SRC_CPU, 0, 1), MUX(none, "mout_cpu", mout_cpu_p, SRC_CPU, 16, 1), MUX(none, "mout_mpll_fout", mout_mpll_fout_p, PLL_DIV2_SEL, 4, 1), @@ -254,7 +257,7 @@ struct samsung_mux_clock exynos5250_mux_clks[] __initdata = { MUX(none, "mout_spi2", mout_group1_p, SRC_PERIC1, 24, 4), }; -struct samsung_div_clock exynos5250_div_clks[] __initdata = { +static struct samsung_div_clock exynos5250_div_clks[] __initdata = { DIV(none, "div_arm", "mout_cpu", DIV_CPU0, 0, 3), DIV(none, "sclk_apll", "mout_apll", DIV_CPU0, 24, 3), DIV(none, "aclk66_pre", "sclk_mpll_user", DIV_TOP1, 24, 3), @@ -314,7 +317,7 @@ struct samsung_div_clock exynos5250_div_clks[] __initdata = { DIV_PERIC2, 8, 8, CLK_SET_RATE_PARENT, 0), }; -struct samsung_gate_clock exynos5250_gate_clks[] __initdata = { +static struct samsung_gate_clock exynos5250_gate_clks[] __initdata = { GATE(gscl0, "gscl0", "none", GATE_IP_GSCL, 0, 0, 0), GATE(gscl1, "gscl1", "none", GATE_IP_GSCL, 1, 0, 0), GATE(gscl2, "gscl2", "aclk266", GATE_IP_GSCL, 2, 0, 0), @@ -471,7 +474,7 @@ static __initdata struct of_device_id ext_clk_match[] = { }; /* register exynox5250 clocks */ -void __init exynos5250_clk_init(struct device_node *np) +static void __init exynos5250_clk_init(struct device_node *np) { void __iomem *reg_base; struct clk *apll, *mpll, *epll, *vpll, *bpll, *gpll, *cpll;