From patchwork Tue Apr 16 10:05:19 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sachin Kamat X-Patchwork-Id: 2448721 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 5F9B1E0248 for ; Tue, 16 Apr 2013 10:17:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965037Ab3DPKRn (ORCPT ); Tue, 16 Apr 2013 06:17:43 -0400 Received: from mail-da0-f54.google.com ([209.85.210.54]:44652 "EHLO mail-da0-f54.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S964932Ab3DPKRm (ORCPT ); Tue, 16 Apr 2013 06:17:42 -0400 Received: by mail-da0-f54.google.com with SMTP id p1so185664dad.13 for ; Tue, 16 Apr 2013 03:17:41 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:x-gm-message-state; bh=kMrfVccuwmkXS5HGOzJTn45bxReoo+bSKG5xyIF8NwM=; b=QS8t9mzuPUu6JD1MRntQyLuz0+tFsT2991TnPEW/y8pC+kRcHX/CaygSC1d31lA+8r qmZ0zmeQcLfmehgDSdGP6t6JxEZcZGEKwlpsY5bTQEONH1+LgtqkvMxuwU5My4NLfHom zyGOWd0f20GZn3YJ3T8k3m6ds2cutD73MBE0VEckpf1VEaC2jPZT/TAnhMPawuMi5dJ3 XoKPLLna8DQyMoIHJsX+sSOlMl6wbtckY45H/0mCy4xWS+nciESqCH/iWuOlCagIOkYf 9RSTZV0HNUk08exDBUUf5imeSlwjH/sOcdFPrlxaCIrcAMvbArUhCCQ0enGjeSj7QiIY 3O0g== X-Received: by 10.66.123.97 with SMTP id lz1mr2846526pab.137.1366107461499; Tue, 16 Apr 2013 03:17:41 -0700 (PDT) Received: from linaro.sisodomain.com ([115.113.119.130]) by mx.google.com with ESMTPS id ky10sm2071764pab.23.2013.04.16.03.17.38 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 16 Apr 2013 03:17:40 -0700 (PDT) From: Sachin Kamat To: linux-samsung-soc@vger.kernel.org Cc: kgene.kim@samsung.com, mturquette@linaro.org, thomas.abraham@linaro.org, sachin.kamat@linaro.org, patches@linaro.org Subject: [PATCH 3/3] clk: exynos5440: Staticize local symbols Date: Tue, 16 Apr 2013 15:35:19 +0530 Message-Id: <1366106719-26342-3-git-send-email-sachin.kamat@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1366106719-26342-1-git-send-email-sachin.kamat@linaro.org> References: <1366106719-26342-1-git-send-email-sachin.kamat@linaro.org> X-Gm-Message-State: ALoCoQm5zlyz/F72vn6utrDcQS4iWx7u1s4nQ3z2bEwldsBb6RGb/mPS6UffAET2bT3dR1xhup4t Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org These symbols are used only in this file and hence should be static. Signed-off-by: Sachin Kamat Acked-by: Kukjin Kim --- drivers/clk/samsung/clk-exynos5440.c | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos5440.c b/drivers/clk/samsung/clk-exynos5440.c index a0a094c..ac6c95f 100644 --- a/drivers/clk/samsung/clk-exynos5440.c +++ b/drivers/clk/samsung/clk-exynos5440.c @@ -42,12 +42,14 @@ PNAME(mout_armclk_p) = { "cplla", "cpllb" }; PNAME(mout_spi_p) = { "div125", "div200" }; /* fixed rate clocks generated outside the soc */ -struct samsung_fixed_rate_clock exynos5440_fixed_rate_ext_clks[] __initdata = { +static struct +samsung_fixed_rate_clock exynos5440_fixed_rate_ext_clks[] __initdata = { FRATE(none, "xtal", NULL, CLK_IS_ROOT, 0), }; /* fixed rate clocks */ -struct samsung_fixed_rate_clock exynos5440_fixed_rate_clks[] __initdata = { +static struct +samsung_fixed_rate_clock exynos5440_fixed_rate_clks[] __initdata = { FRATE(none, "ppll", NULL, CLK_IS_ROOT, 1000000000), FRATE(none, "usb_phy0", NULL, CLK_IS_ROOT, 60000000), FRATE(none, "usb_phy1", NULL, CLK_IS_ROOT, 60000000), @@ -56,26 +58,27 @@ struct samsung_fixed_rate_clock exynos5440_fixed_rate_clks[] __initdata = { }; /* fixed factor clocks */ -struct samsung_fixed_factor_clock exynos5440_fixed_factor_clks[] __initdata = { +static struct +samsung_fixed_factor_clock exynos5440_fixed_factor_clks[] __initdata = { FFACTOR(none, "div250", "ppll", 1, 4, 0), FFACTOR(none, "div200", "ppll", 1, 5, 0), FFACTOR(none, "div125", "div250", 1, 2, 0), }; /* mux clocks */ -struct samsung_mux_clock exynos5440_mux_clks[] __initdata = { +static struct samsung_mux_clock exynos5440_mux_clks[] __initdata = { MUX(none, "mout_spi", mout_spi_p, MISC_DOUT1, 5, 1), MUX_A(arm_clk, "arm_clk", mout_armclk_p, CPU_CLK_STATUS, 0, 1, "armclk"), }; /* divider clocks */ -struct samsung_div_clock exynos5440_div_clks[] __initdata = { +static struct samsung_div_clock exynos5440_div_clks[] __initdata = { DIV(spi_baud, "div_spi", "mout_spi", MISC_DOUT1, 3, 2), }; /* gate clocks */ -struct samsung_gate_clock exynos5440_gate_clks[] __initdata = { +static struct samsung_gate_clock exynos5440_gate_clks[] __initdata = { GATE(pb0_250, "pb0_250", "div250", CLKEN_OV_VAL, 3, 0, 0), GATE(pr0_250, "pr0_250", "div250", CLKEN_OV_VAL, 4, 0, 0), GATE(pr1_250, "pr1_250", "div250", CLKEN_OV_VAL, 5, 0, 0), @@ -104,7 +107,7 @@ static __initdata struct of_device_id ext_clk_match[] = { }; /* register exynos5440 clocks */ -void __init exynos5440_clk_init(struct device_node *np) +static void __init exynos5440_clk_init(struct device_node *np) { void __iomem *reg_base;