From patchwork Mon Apr 29 11:31:47 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Inderpal Singh X-Patchwork-Id: 2499781 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id A80FDDF25A for ; Mon, 29 Apr 2013 11:31:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754972Ab3D2Lb7 (ORCPT ); Mon, 29 Apr 2013 07:31:59 -0400 Received: from mail-pa0-f41.google.com ([209.85.220.41]:36578 "EHLO mail-pa0-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752444Ab3D2Lb6 (ORCPT ); Mon, 29 Apr 2013 07:31:58 -0400 Received: by mail-pa0-f41.google.com with SMTP id kq12so2880788pab.14 for ; Mon, 29 Apr 2013 04:31:57 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer :x-gm-message-state; bh=MqeanR1lu970iRPtXXPs3aYGmTHNIaeUBMnN1FdtBGA=; b=M3vouf0u2gmDA30/q180J0QL+DGJsiiCdjgobIIHZk6JwcNvecHHTITG+CeKcQADx9 xEutLhWgMJFrkZMMGcsVhN3DVHuU0Hpncl5+Tf5Lt8yxbiaMPpIyRWN3dbVriJ2zEybL 4qcqMkaZnoIJ5xfBjp0eDkq9Ph9iH0D4gi4l9/4NMYHZQtpx0rPF+IR8yPztzPSYXEl+ 9Na7tuwhjOZzPeUqbX5mX5kV76NOjiQucaLWEatTGTsARswe/qKJcGfoOtdQz5TyL1P5 KF6/4p5fQ6/MtDe1KjhXD0OKwQRTVS3c5eq4qrXniPw6ziYFPpxJmUlAsBiUkBoBGAoZ 7ePA== X-Received: by 10.66.156.68 with SMTP id wc4mr42017888pab.58.1367235117611; Mon, 29 Apr 2013 04:31:57 -0700 (PDT) Received: from inder-ubuntu.sisodomain.com ([115.113.119.130]) by mx.google.com with ESMTPSA id vv6sm25576591pab.6.2013.04.29.04.31.52 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 29 Apr 2013 04:31:55 -0700 (PDT) From: Inderpal Singh To: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: kgene.kim@samsung.com, arnd@arndb.de, olof@lixom.net, lorenzo.pieralisi@arm.com, patches@linaro.org Subject: [PATCH] ARM: EXYNOS5: Fix kernel dump in AFTR idle mode Date: Mon, 29 Apr 2013 17:01:47 +0530 Message-Id: <1367235107-31328-1-git-send-email-inderpal.singh@linaro.org> X-Mailer: git-send-email 1.7.9.5 X-Gm-Message-State: ALoCoQlaFL7d5HWoo8hUiXg8qIFe85wQ64iUNth1ss6rFfC/AqA7j0lZYhMuwH7NRhvhqRFP1agn Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org The kernel crashes while resuming from AFTR idle mode. It happens because L2 cache was not going into retention state. This patch configures the USE_RETENTION bit of ARM_L2_OPTION register so that it does not depend on MANUAL_L2RSTDISABLE_CONTROL of ARM_COMMON_OPTION register for L2RSTDISABLE signal. Signed-off-by: Inderpal Singh Tested-by: Chander Kashyap --- Tested on arndale board on arm-soc next/soc branch. arch/arm/mach-exynos/include/mach/regs-pmu.h | 1 + arch/arm/mach-exynos/pmu.c | 5 ++--- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-exynos/include/mach/regs-pmu.h b/arch/arm/mach-exynos/include/mach/regs-pmu.h index 3f30aa1..57344b7 100644 --- a/arch/arm/mach-exynos/include/mach/regs-pmu.h +++ b/arch/arm/mach-exynos/include/mach/regs-pmu.h @@ -344,6 +344,7 @@ #define EXYNOS5_FSYS_ARM_OPTION S5P_PMUREG(0x2208) #define EXYNOS5_ISP_ARM_OPTION S5P_PMUREG(0x2288) #define EXYNOS5_ARM_COMMON_OPTION S5P_PMUREG(0x2408) +#define EXYNOS5_ARM_L2_OPTION S5P_PMUREG(0x2608) #define EXYNOS5_TOP_PWR_OPTION S5P_PMUREG(0x2C48) #define EXYNOS5_TOP_PWR_SYSMEM_OPTION S5P_PMUREG(0x2CC8) #define EXYNOS5_JPEG_MEM_OPTION S5P_PMUREG(0x2F48) diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c index daebc1a..97d6885 100644 --- a/arch/arm/mach-exynos/pmu.c +++ b/arch/arm/mach-exynos/pmu.c @@ -228,6 +228,7 @@ static struct exynos_pmu_conf exynos5250_pmu_config[] = { { EXYNOS5_DIS_IRQ_ISP_ARM_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} }, { EXYNOS5_ARM_COMMON_SYS_PWR_REG, { 0x0, 0x0, 0x2} }, { EXYNOS5_ARM_L2_SYS_PWR_REG, { 0x3, 0x3, 0x3} }, + { EXYNOS5_ARM_L2_OPTION, { 0x10, 0x10, 0x0 } }, { EXYNOS5_CMU_ACLKSTOP_SYS_PWR_REG, { 0x1, 0x0, 0x1} }, { EXYNOS5_CMU_SCLKSTOP_SYS_PWR_REG, { 0x1, 0x0, 0x1} }, { EXYNOS5_CMU_RESET_SYS_PWR_REG, { 0x1, 0x1, 0x0} }, @@ -353,11 +354,9 @@ static void exynos5_init_pmu(void) /* * SKIP_DEACTIVATE_ACEACP_IN_PWDN_BITFIELD Enable - * MANUAL_L2RSTDISABLE_CONTROL_BITFIELD Enable */ tmp = __raw_readl(EXYNOS5_ARM_COMMON_OPTION); - tmp |= (EXYNOS5_MANUAL_L2RSTDISABLE_CONTROL | - EXYNOS5_SKIP_DEACTIVATE_ACEACP_IN_PWDN); + tmp |= EXYNOS5_SKIP_DEACTIVATE_ACEACP_IN_PWDN; __raw_writel(tmp, EXYNOS5_ARM_COMMON_OPTION); /*