From patchwork Tue May 14 09:58:56 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kachhap X-Patchwork-Id: 2564151 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 5767340B27 for ; Tue, 14 May 2013 10:02:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932377Ab3ENKCs (ORCPT ); Tue, 14 May 2013 06:02:48 -0400 Received: from mail-pa0-f41.google.com ([209.85.220.41]:57080 "EHLO mail-pa0-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932290Ab3ENKBV (ORCPT ); Tue, 14 May 2013 06:01:21 -0400 Received: by mail-pa0-f41.google.com with SMTP id rl6so376952pac.14 for ; Tue, 14 May 2013 03:01:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:sender:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references; bh=dYsRFJnI0kmo4B9aAWB/6KA9MIuZWFn9QaNCjuQR7gI=; b=bjluyuEgjgKbvRNrABxqc/R0XeOeeU2bm0J5nkBv5yJ5bLj89ocGw88EYoi5ZcmROR GOGyoZgRgsZer+wTAiIKdqAH+hovtA8wtggzwtbiUgAXLYQ3a/Dlbq4VVptyUeOM/qXh OHT92QFQwn1cyjVJNz8kIqRjd/FOZxcYqsdE3GmTEa0jzz+e4+xmm+D9u7RgM5xplXme 6b84yxjv1EWgdnu1GfhUVi/PxLgNfbk0MlZ5B3/M+sByQH0LndWIPWe1yM5kX1nuDZfy cE62qKcMc8L6TDymnmuU89LIdVq93nYctmUfsFCPK9vfIkMYjGtRKzKO3+Iuqp9NFTwi WIQQ== X-Received: by 10.68.197.165 with SMTP id iv5mr32567362pbc.213.1368525680611; Tue, 14 May 2013 03:01:20 -0700 (PDT) Received: from localhost.localdomain ([115.113.119.130]) by mx.google.com with ESMTPSA id kv2sm17617396pbc.28.2013.05.14.03.01.16 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 14 May 2013 03:01:19 -0700 (PDT) From: Amit Daniel Kachhap To: linux-pm@vger.kernel.org Cc: Zhang Rui , linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, amit.kachhap@gmail.com, Kukjin Kim , Eduardo Valentin Subject: [PATCH V4 26/30] thermal: exynos: Add hardware mode thermal calibration support Date: Tue, 14 May 2013 15:28:56 +0530 Message-Id: <1368525540-15034-27-git-send-email-amit.daniel@samsung.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1368525540-15034-1-git-send-email-amit.daniel@samsung.com> References: <1368525540-15034-1-git-send-email-amit.daniel@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org This patch adds support for h/w mode calibration in the TMU controller. soc's like 5440 support this features. Acked-by: Kukjin Kim Signed-off-by: Amit Daniel Kachhap --- drivers/thermal/samsung/exynos_tmu.c | 15 +++++++++++++++ drivers/thermal/samsung/exynos_tmu.h | 6 ++++++ drivers/thermal/samsung/exynos_tmu_data.c | 2 ++ drivers/thermal/samsung/exynos_tmu_data.h | 2 ++ 4 files changed, 25 insertions(+), 0 deletions(-) diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c index f32d275..ad57d2d 100644 --- a/drivers/thermal/samsung/exynos_tmu.c +++ b/drivers/thermal/samsung/exynos_tmu.c @@ -73,6 +73,9 @@ static int temp_to_code(struct exynos_tmu_data *data, u8 temp) struct exynos_tmu_platform_data *pdata = data->pdata; int temp_code; + if (pdata->cal_mode == HW_MODE) + return temp; + if (data->soc == SOC_ARCH_EXYNOS4210) /* temp should range between 25 and 125 */ if (temp < 25 || temp > 125) { @@ -107,6 +110,9 @@ static int code_to_temp(struct exynos_tmu_data *data, u8 temp_code) struct exynos_tmu_platform_data *pdata = data->pdata; int temp; + if (pdata->cal_mode == HW_MODE) + return temp_code; + if (data->soc == SOC_ARCH_EXYNOS4210) /* temp_code should range between 75 and 175 */ if (temp_code < 75 || temp_code > 175) { @@ -155,6 +161,9 @@ static int exynos_tmu_initialize(struct platform_device *pdev) if (TMU_SUPPORTS(pdata, TRIM_RELOAD)) __raw_writel(1, data->base + reg->triminfo_ctrl); + if (pdata->cal_mode == HW_MODE) + goto skip_calib_data; + /* Save trimming info in order to perform calibration */ if (data->soc == SOC_ARCH_EXYNOS5440) { /* @@ -190,6 +199,7 @@ static int exynos_tmu_initialize(struct platform_device *pdev) (pdata->efuse_value >> reg->triminfo_85_shift) & EXYNOS_TMU_TEMP_MASK; +skip_calib_data: /* Count trigger levels to be enabled */ for (i = 0; i < MAX_THRESHOLD_LEVS; i++) if (pdata->trigger_levels[i]) @@ -303,6 +313,11 @@ static void exynos_tmu_control(struct platform_device *pdev, bool on) con |= (pdata->noise_cancel_mode << reg->therm_trip_mode_shift); } + if (pdata->cal_mode == HW_MODE) { + con &= ~(reg->calib_mode_mask << reg->calib_mode_shift); + con |= pdata->cal_type << reg->calib_mode_shift; + } + if (on) { con |= (1 << reg->core_en_shift); interrupt_en = diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h index 9151a30..fa6a796 100644 --- a/drivers/thermal/samsung/exynos_tmu.h +++ b/drivers/thermal/samsung/exynos_tmu.h @@ -91,6 +91,10 @@ enum soc_type { * @buf_slope_sel_shift: shift bits of amplifier gain value in tmu_ctrl register. * @buf_slope_sel_mask: mask bits of amplifier gain value in tmu_ctrl register. + * @calib_mode_shift: shift bits of calibration mode value in tmu_ctrl + register. + * @calib_mode_mask: mask bits of calibration mode value in tmu_ctrl + register. * @therm_trip_tq_en_shift: shift bits of thermal trip enable by TQ pin in tmu_ctrl register. * @core_en_shift: shift bits of TMU core enable bit in tmu_ctrl register. @@ -152,6 +156,8 @@ struct exynos_tmu_registers { u32 therm_trip_en_shift; u32 buf_slope_sel_shift; u32 buf_slope_sel_mask; + u32 calib_mode_shift; + u32 calib_mode_mask; u32 therm_trip_tq_en_shift; u32 core_en_shift; diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c index d622cb4..60a4ca0 100644 --- a/drivers/thermal/samsung/exynos_tmu_data.c +++ b/drivers/thermal/samsung/exynos_tmu_data.c @@ -174,6 +174,8 @@ static const struct exynos_tmu_registers exynos5440_tmu_registers = { .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT, .buf_slope_sel_shift = EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT, .buf_slope_sel_mask = EXYNOS_TMU_BUF_SLOPE_SEL_MASK, + .calib_mode_shift = EXYNOS_TMU_CALIB_MODE_SHIFT, + .calib_mode_mask = EXYNOS_TMU_CALIB_MODE_MASK, .core_en_shift = EXYNOS_TMU_CORE_EN_SHIFT, .tmu_status = EXYNOS5440_TMU_S0_7_STATUS, .tmu_cur_temp = EXYNOS5440_TMU_S0_7_TEMP, diff --git a/drivers/thermal/samsung/exynos_tmu_data.h b/drivers/thermal/samsung/exynos_tmu_data.h index a1cc8ab..d97ccf8 100644 --- a/drivers/thermal/samsung/exynos_tmu_data.h +++ b/drivers/thermal/samsung/exynos_tmu_data.h @@ -75,6 +75,8 @@ #define EXYNOS_TMU_TRIP_MODE_SHIFT 13 #define EXYNOS_TMU_TRIP_MODE_MASK 0x7 #define EXYNOS_TMU_THERM_TRIP_EN_SHIFT 12 +#define EXYNOS_TMU_CALIB_MODE_SHIFT 4 +#define EXYNOS_TMU_CALIB_MODE_MASK 0x3 #define EXYNOS_TMU_INTEN_RISE0_SHIFT 0 #define EXYNOS_TMU_INTEN_RISE1_SHIFT 4