From patchwork Wed May 29 13:37:57 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vikas C Sajjan X-Patchwork-Id: 2629791 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 24604E01D7 for ; Wed, 29 May 2013 13:38:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966208Ab3E2Niq (ORCPT ); Wed, 29 May 2013 09:38:46 -0400 Received: from mail-pd0-f173.google.com ([209.85.192.173]:57633 "EHLO mail-pd0-f173.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S966078Ab3E2Nio (ORCPT ); Wed, 29 May 2013 09:38:44 -0400 Received: by mail-pd0-f173.google.com with SMTP id v14so7680557pde.32 for ; Wed, 29 May 2013 06:38:43 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=IcB7LDPfCC9PnCGg4HJ6WWT74K87S60OCER3ZMH9vY0=; b=ojKS3WtJjgUHCcGpPckZFXx//Nl7/D4TorWZhE2A9B+4d612iK3nN+3gMc8Ol9ewU3 aczHKfnl8nUP/BnNVn6fbCibSVz1eb92rqb3QY/xFIgxFQllO2SgbgWd/23NBDda7yRX g/jImaL/TGraG8wDu0vpWJdiyU4pAN1U8GVT9/rZ5qtkkegYaAAI1wAeoJSscq/8VIxM hXnud9f8/ENXYFIgclWXNhAkJOEkX9+S9/t4wIuv/AT506mg27N+48HWgvF9ge2lNqO/ j1SspIid9z4SNctVMKKkRFiwC8BxLjTIBq9AGb3L2BhEDEh7ESvKgHe1X/0WJa1w+KaQ ijuA== X-Received: by 10.66.27.174 with SMTP id u14mr3425682pag.97.1369834723540; Wed, 29 May 2013 06:38:43 -0700 (PDT) Received: from localhost.localdomain ([115.113.119.130]) by mx.google.com with ESMTPSA id b7sm37356944pba.39.2013.05.29.06.38.39 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 29 May 2013 06:38:42 -0700 (PDT) From: Vikas Sajjan To: linux-samsung-soc@vger.kernel.org Cc: kgene.kim@samsung.com, t.figa@samsung.com, yadi.brar01@gmail.com, dianders@chromium.org, mturquette@linaro.org, linux-arm-kernel@lists.infradead.org, thomas.abraham@linaro.org, patches@linaro.org, linaro-kernel@lists.linaro.org Subject: [PATCH v2 5/5] clk: samsung: Add EPLL and VPLL freq table for exynos5250 SoC Date: Wed, 29 May 2013 19:07:57 +0530 Message-Id: <1369834677-20312-6-git-send-email-vikas.sajjan@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1369834677-20312-1-git-send-email-vikas.sajjan@linaro.org> References: <1369834677-20312-1-git-send-email-vikas.sajjan@linaro.org> X-Gm-Message-State: ALoCoQk0JjmUvlz4t7cVyqA5GJP2515W9Esz7JQ49wIBRaBSrjmalV9B06hRdFtJkzuizqM0kMLz Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Adds the EPLL and VPLL freq table for exynos5250 SoC. Signed-off-by: Vikas Sajjan --- drivers/clk/samsung/clk-exynos5250.c | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c index ddf10ca..bf61091 100644 --- a/drivers/clk/samsung/clk-exynos5250.c +++ b/drivers/clk/samsung/clk-exynos5250.c @@ -469,6 +469,22 @@ static __initdata struct of_device_id ext_clk_match[] = { { }, }; +static const struct samsung_pll_rate_table vpll_tbl[] = { + PLL_36XX_RATE(70500000, 94, 2, 4, 0), +}; + +static const struct samsung_pll_rate_table epll_tbl[] = { + /* sorted in descending order */ + PLL_36XX_RATE(192000000, 48, 3, 1, 0), + PLL_36XX_RATE(180633600, 45, 3, 1, 10381), + PLL_36XX_RATE(180000000, 45, 3, 1, 0), + PLL_36XX_RATE(73728000, 73, 3, 3, 47710), + PLL_36XX_RATE(67737600, 90, 4, 3, 20762), + PLL_36XX_RATE(49152000, 49, 3, 3, 9962), + PLL_36XX_RATE(45158400, 45, 3, 3, 10381), + PLL_36XX_RATE(32768000, 131, 3, 5, 4719), +}; + /* register exynox5250 clocks */ void __init exynos5250_clk_init(struct device_node *np) { @@ -501,9 +517,9 @@ void __init exynos5250_clk_init(struct device_node *np) cpll = samsung_clk_register_pll35xx("fout_cpll", "fin_pll", reg_base + 0x10020, NULL, 0); epll = samsung_clk_register_pll36xx("fout_epll", "fin_pll", - reg_base + 0x10030, NULL, 0); + reg_base + 0x10030, epll_tbl, ARRAY_SIZE(epll_tbl)); vpll = samsung_clk_register_pll36xx("fout_vpll", "mout_vpllsrc", - reg_base + 0x10040, NULL, 0); + reg_base + 0x10040, vpll_tbl, ARRAY_SIZE(vpll_tbl)); samsung_clk_register_fixed_rate(exynos5250_fixed_rate_clks, ARRAY_SIZE(exynos5250_fixed_rate_clks));