From patchwork Wed Jul 24 10:09:15 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sachin Kamat X-Patchwork-Id: 2832632 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 47A7C9F243 for ; Wed, 24 Jul 2013 10:25:42 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5CDD52021B for ; Wed, 24 Jul 2013 10:25:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 638D220214 for ; Wed, 24 Jul 2013 10:25:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751387Ab3GXKZj (ORCPT ); Wed, 24 Jul 2013 06:25:39 -0400 Received: from mail-pd0-f177.google.com ([209.85.192.177]:42955 "EHLO mail-pd0-f177.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751356Ab3GXKZi (ORCPT ); Wed, 24 Jul 2013 06:25:38 -0400 Received: by mail-pd0-f177.google.com with SMTP id u11so222863pdi.36 for ; Wed, 24 Jul 2013 03:25:37 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:x-gm-message-state; bh=u+BDZuDR36gOfQIf1Pw7Ct2nlC2tubfmD3BgJ54fbk0=; b=hk32tUj8k0CLxngB/F1lEo97n1ufpGwha93rOPG/mUyN2XTaRAFe9GuOBEwYIPIxRL fmTc8jifPEWHqcTF6k9KFOZ5FectFINjXIrcSuMRL+CInL1o6bat3nOJ24BjVF4dXcmg 89CORrymBsJ3SpsqKXC7yKpjUH+8U8JaxskgA54E8ECp2smoW7Kiq4umfCnqCRO5O4lX ocp84C6pUHV2ZCFPXPsr+H4nU5Sve4telAk+sFfI1BjVbeKBIkiTS0rrNvcwxWSySxNr bwv7yDEFohQ4o4S4taxl6ykX4spR8nydUpDyFRh8nDfm/gOmVXl7Odv8E3hjw2SwHNyP B6Lg== X-Received: by 10.66.253.69 with SMTP id zy5mr38274350pac.29.1374661537430; Wed, 24 Jul 2013 03:25:37 -0700 (PDT) Received: from linaro.sisodomain.com ([115.113.119.130]) by mx.google.com with ESMTPSA id bg3sm47016973pbb.44.2013.07.24.03.25.34 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 24 Jul 2013 03:25:36 -0700 (PDT) From: Sachin Kamat To: linux-arm-kernel@lists.infradead.org Cc: linux-samsung-soc@vger.kernel.org, kgene.kim@samsung.com, kgene@kernel.org, mturquette@linaro.org, sachin.kamat@linaro.org Subject: [PATCH Resend 1/1] clk: exynos4: Add clock entries for TMU Date: Wed, 24 Jul 2013 15:39:15 +0530 Message-Id: <1374660555-17429-1-git-send-email-sachin.kamat@linaro.org> X-Mailer: git-send-email 1.7.9.5 X-Gm-Message-State: ALoCoQkETJb3LG6Dair66jw2yB9YCguamBC+gq7CgmYA5FihTCG70mQEmKZS0wkYq4IM0PKSxZp3 Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Added clock entries for thermal management unit (TMU) for Exynos4 SoCs. Signed-off-by: Sachin Kamat Acked-by: Kukjin Kim --- Resending this (after rebasing) based on the below discussion: http://comments.gmane.org/gmane.linux.kernel.samsung-soc/19933 Previous version: http://comments.gmane.org/gmane.linux.kernel.samsung-soc/18081 --- .../devicetree/bindings/clock/exynos4-clock.txt | 1 + drivers/clk/samsung/clk-exynos4.c | 4 +++- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/clock/exynos4-clock.txt b/Documentation/devicetree/bindings/clock/exynos4-clock.txt index 14d5c2a..c6bf8a6 100644 --- a/Documentation/devicetree/bindings/clock/exynos4-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos4-clock.txt @@ -236,6 +236,7 @@ Exynos4 SoC and this is specified where applicable. spi0_isp_sclk 380 Exynos4x12 spi1_isp_sclk 381 Exynos4x12 uart_isp_sclk 382 Exynos4x12 + tmu_apbif 383 [Mux Clocks] diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c index 75635eb..cee297d 100644 --- a/drivers/clk/samsung/clk-exynos4.c +++ b/drivers/clk/samsung/clk-exynos4.c @@ -169,7 +169,7 @@ enum exynos4_clks { gicisp, smmu_isp, smmu_drc, smmu_fd, smmu_lite0, smmu_lite1, mcuctl_isp, mpwm_isp, i2c0_isp, i2c1_isp, mtcadc_isp, pwm_isp, wdt_isp, uart_isp, asyncaxim, smmu_ispcx, spi0_isp, spi1_isp, pwm_isp_sclk, spi0_isp_sclk, - spi1_isp_sclk, uart_isp_sclk, + spi1_isp_sclk, uart_isp_sclk, tmu_apbif, /* mux clocks */ mout_fimc0 = 384, mout_fimc1, mout_fimc2, mout_fimc3, mout_cam0, @@ -814,6 +814,7 @@ static struct samsung_gate_clock exynos4210_gate_clks[] __initdata = { GATE_A(keyif, "keyif", "aclk100", E4210_GATE_IP_PERIR, 16, 0, 0, "keypad"), GATE_DA(sclk_fimd1, "exynos4-fb.1", "sclk_fimd1", "div_fimd1", E4210_SRC_MASK_LCD1, 0, CLK_SET_RATE_PARENT, 0, "sclk_fimd"), + GATE(tmu_apbif, "tmu_apbif", "aclk100", E4210_GATE_IP_PERIR, 17, 0, 0), }; /* list of gate clocks supported in exynos4x12 soc */ @@ -915,6 +916,7 @@ static struct samsung_gate_clock exynos4x12_gate_clks[] __initdata = { GATE(spi1_isp, "spi1_isp", "aclk200", E4X12_GATE_ISP1, 13, CLK_IGNORE_UNUSED, 0), GATE(g2d, "g2d", "aclk200", GATE_IP_DMC, 23, 0, 0), + GATE(tmu_apbif, "tmu_apbif", "aclk100", E4X12_GATE_IP_PERIR, 17, 0, 0), }; /*