From patchwork Wed Jul 24 14:13:33 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rahul Sharma X-Patchwork-Id: 2832748 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id D292FC031A for ; Wed, 24 Jul 2013 13:52:10 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 9E530201E6 for ; Wed, 24 Jul 2013 13:52:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 55A4E201E0 for ; Wed, 24 Jul 2013 13:52:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751085Ab3GXNwH (ORCPT ); Wed, 24 Jul 2013 09:52:07 -0400 Received: from mailout3.samsung.com ([203.254.224.33]:21116 "EHLO mailout3.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751035Ab3GXNwG (ORCPT ); Wed, 24 Jul 2013 09:52:06 -0400 Received: from epcpsbgr4.samsung.com (u144.gpu120.samsung.co.kr [203.254.230.144]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MQG00CHV16T0N90@mailout3.samsung.com> for linux-samsung-soc@vger.kernel.org; Wed, 24 Jul 2013 22:52:05 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.125]) by epcpsbgr4.samsung.com (EPCPMTA) with SMTP id 62.C3.29708.50CDFE15; Wed, 24 Jul 2013 22:52:05 +0900 (KST) X-AuditID: cbfee690-b7f6f6d00000740c-9b-51efdc05e67f Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id A9.DB.31505.50CDFE15; Wed, 24 Jul 2013 22:52:05 +0900 (KST) Received: from chromeserver-PowerEdge-T410.sisodomain.com ([107.108.73.106]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MQG007LX14I0H50@mmp1.samsung.com>; Wed, 24 Jul 2013 22:52:05 +0900 (KST) From: Rahul Sharma To: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: kgene.kim@samsung.com, mturquette@linaro.org, inki.dae@samsung.com, s.nawrocki@samsung.com, thomas.abraham@linaro.org, joshi@samsung.com, r.sh.open@gmail.com, Rahul Sharma Subject: [PATCH v3 3/5] clk/exynos5250: add sclk_hdmiphy in the list of special clocks Date: Wed, 24 Jul 2013 19:43:33 +0530 Message-id: <1374675215-27862-4-git-send-email-rahul.sharma@samsung.com> X-Mailer: git-send-email 1.7.10.4 In-reply-to: <1374675215-27862-1-git-send-email-rahul.sharma@samsung.com> References: <1374675215-27862-1-git-send-email-rahul.sharma@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmpmkeLIzCtJLcpLzFFi42JZI2JSq8t6532gwYvfohaT7k9gsfi+6wu7 Re+Cq2wWmx5fY7WYcX4fk8XTCRfZLBa+iLeYsugwq8XhN+2sFsdmLGF04PLYOesuu8eda3vY PDYvqffo27KK0ePzJrkA1igum5TUnMyy1CJ9uwSujHunCws2C1Qc2tbE1MD4ibeLkYNDQsBE YsLqgi5GTiBTTOLCvfVsXYxcHEICSxkl1q7vYYdImEj8ujWPGSKxiFHi2Ze9TBDObCaJ63en s4FUsQnoSsw++IwRxBYR8JaYfOYvO0gRs8A5RonJk84wgySEBSIk5v+9D9bAIqAqMXvbF1YQ m1fAQ2LNro9MEOsUJbqfTQCr4RTwlJgx7zuYLQRUM/HgR1aQoRICm9glTh9vY4QYJCDxbfIh Foh/ZCU2HWCGmCMpcXDFDZYJjMILGBlWMYqmFiQXFCelF5noFSfmFpfmpesl5+duYgRGwOl/ zybsYLx3wPoQYzLQuInMUqLJ+cAIyiuJNzQ2M7IwNTE1NjK3NCNNWEmcV73FOlBIID2xJDU7 NbUgtSi+qDQntfgQIxMHp1QDo+40JvljlpMCfotfv+J18dEytqx1PJsv86UduSRmnpx8Jm6f +4ZjFsJha5IWHV6n+902+Ibb5TNMqrJ8N6e7rb4y++lEr71bJCzXep/9zei2/0t2dYnc31rN LUX5r42FT6jx3Aj8/LIqcUnDmS/Xfhd6XtVXCGM67D3tdKCcipucO1Nfonn9HSWW4oxEQy3m ouJEAI1RTUWWAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrIIsWRmVeSWpSXmKPExsVy+t9jAV3WO+8DDRpe8lhMuj+BxeL7ri/s Fr0LrrJZbHp8jdVixvl9TBZPJ1xks1j4It5iyqLDrBaH37SzWhybsYTRgctj56y77B53ru1h 89i8pN6jb8sqRo/Pm+QCWKMaGG0yUhNTUosUUvOS81My89JtlbyD453jTc0MDHUNLS3MlRTy EnNTbZVcfAJ03TJzgI5SUihLzCkFCgUkFhcr6dthmhAa4qZrAdMYoesbEgTXY2SABhLWMGbc O11YsFmg4tC2JqYGxk+8XYycHBICJhK/bs1jhrDFJC7cW8/WxcjFISSwiFHi2Ze9TBDObCaJ 63ens4FUsQnoSsw++IwRxBYR8JaYfOYvO0gRs8A5RonJk86AjRIWiJCY//c+WAOLgKrE7G1f WEFsXgEPiTW7PjJBrFOU6H42AayGU8BTYsa872C2EFDNxIMfWScw8i5gZFjFKJpakFxQnJSe a6RXnJhbXJqXrpecn7uJERxhz6R3MK5qsDjEKMDBqMTDWzDrXaAQa2JZcWXuIUYJDmYlEV6r +e8DhXhTEiurUovy44tKc1KLDzEmA101kVlKNDkfGP15JfGGxibmpsamliYWJmaWpAkrifMe bLUOFBJITyxJzU5NLUgtgtnCxMEp1cBoOFHUIE+u81nbxyc3b5XVy/WaTOMpfuzQcYfvzd68 q/O4k5c7HH512VtiFdOCD8c6f335YX5r0qw/Vix138MO+Ucv1p6YJ2ebmf5c8ceUoGNxb982 bjl2ZUu2xVahH0wT/haesvx9NlMyyHvfhTXZ/1RCT12MKxDrLi8yfT7h0OpnpQcleL2XKLEU ZyQaajEXFScCAPx1c4D0AgAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP hdmi driver needs hdmiphy clock which is one of the parent for hdmi mux clock. This is required while changing the parent of mux clock. Signed-off-by: Rahul Sharma Conflicts: drivers/clk/samsung/clk-exynos5250.c --- Documentation/devicetree/bindings/clock/exynos5250-clock.txt | 1 + drivers/clk/samsung/clk-exynos5250.c | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt index 488fbb2..10b9f2a 100644 --- a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt @@ -61,6 +61,7 @@ clock which they consume. sclk_spi2 156 div_i2s1 157 div_i2s2 158 + sclk_hdmiphy 159 [Peripheral Clock Gates] diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c index df44419..9579cfe 100644 --- a/drivers/clk/samsung/clk-exynos5250.c +++ b/drivers/clk/samsung/clk-exynos5250.c @@ -87,7 +87,7 @@ enum exynos5250_clks { sclk_mmc0, sclk_mmc1, sclk_mmc2, sclk_mmc3, sclk_sata, sclk_usb3, sclk_jpeg, sclk_uart0, sclk_uart1, sclk_uart2, sclk_uart3, sclk_pwm, sclk_audio1, sclk_audio2, sclk_spdif, sclk_spi0, sclk_spi1, sclk_spi2, - div_i2s1, div_i2s2, + div_i2s1, div_i2s2, sclk_hdmiphy, /* gate clocks */ gscl0 = 256, gscl1, gscl2, gscl3, gscl_wa, gscl_wb, smmu_gscl0, @@ -200,7 +200,7 @@ struct samsung_fixed_rate_clock exynos5250_fixed_rate_ext_clks[] __initdata = { /* fixed rate clocks generated inside the soc */ struct samsung_fixed_rate_clock exynos5250_fixed_rate_clks[] __initdata = { - FRATE(none, "sclk_hdmiphy", NULL, CLK_IS_ROOT, 24000000), + FRATE(sclk_hdmiphy, "sclk_hdmiphy", NULL, CLK_IS_ROOT, 24000000), FRATE(none, "sclk_hdmi27m", NULL, CLK_IS_ROOT, 27000000), FRATE(none, "sclk_dptxphy", NULL, CLK_IS_ROOT, 24000000), FRATE(none, "sclk_uhostphy", NULL, CLK_IS_ROOT, 48000000),