From patchwork Wed Jul 24 14:13:34 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rahul Sharma X-Patchwork-Id: 2832751 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 7017CC0319 for ; Wed, 24 Jul 2013 13:52:21 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3E6BB201E0 for ; Wed, 24 Jul 2013 13:52:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id F0F25201E1 for ; Wed, 24 Jul 2013 13:52:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751333Ab3GXNwS (ORCPT ); Wed, 24 Jul 2013 09:52:18 -0400 Received: from mailout3.samsung.com ([203.254.224.33]:21134 "EHLO mailout3.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751035Ab3GXNwR (ORCPT ); Wed, 24 Jul 2013 09:52:17 -0400 Received: from epcpsbgr4.samsung.com (u144.gpu120.samsung.co.kr [203.254.230.144]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MQG005P8173SES0@mailout3.samsung.com> for linux-samsung-soc@vger.kernel.org; Wed, 24 Jul 2013 22:52:16 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [172.20.52.124]) by epcpsbgr4.samsung.com (EPCPMTA) with SMTP id CD.C3.29708.01CDFE15; Wed, 24 Jul 2013 22:52:16 +0900 (KST) X-AuditID: cbfee690-b7f6f6d00000740c-dc-51efdc10ea16 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id E7.A4.32250.01CDFE15; Wed, 24 Jul 2013 22:52:16 +0900 (KST) Received: from chromeserver-PowerEdge-T410.sisodomain.com ([107.108.73.106]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MQG007LX14I0H50@mmp1.samsung.com>; Wed, 24 Jul 2013 22:52:16 +0900 (KST) From: Rahul Sharma To: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: kgene.kim@samsung.com, mturquette@linaro.org, inki.dae@samsung.com, s.nawrocki@samsung.com, thomas.abraham@linaro.org, joshi@samsung.com, r.sh.open@gmail.com, Rahul Sharma Subject: [PATCH v3 4/5] clk/exynos5250: add clock for mixer sysmmu Date: Wed, 24 Jul 2013 19:43:34 +0530 Message-id: <1374675215-27862-5-git-send-email-rahul.sharma@samsung.com> X-Mailer: git-send-email 1.7.10.4 In-reply-to: <1374675215-27862-1-git-send-email-rahul.sharma@samsung.com> References: <1374675215-27862-1-git-send-email-rahul.sharma@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmpikeLIzCtJLcpLzFFi42JZI2JSoytw532gwY0l+haT7k9gsfi+6wu7 Re+Cq2wWmx5fY7WYcX4fk8XTCRfZLBa+iLeYsugwq8XhN+2sFsdmLGF04PLYOesuu8eda3vY PDYvqffo27KK0ePzJrkA1igum5TUnMyy1CJ9uwSujN7/s5kLpkhVLF4X3MD4R7SLkZNDQsBE 4lzvLnYIW0ziwr31bCC2kMBSRonmm2IwNT+fz2WFiC9ilLiy3rqLkQvIns0ksfH/LbAGNgFd idkHnzGC2CIC3hKTz/xlByliFjjHKDF50hlmkISwgJPEh1WHwBpYBFQlZrQ9BGvgFfCQuNLc wAaxTVGi+9kEMJtTwFNixrzvUBd5SEw8+JEVZKiEwDp2ibZ5j1khBglIfJt8iKWLkQMoISux 6QAzxBxJiYMrbrBMYBRewMiwilE0tSC5oDgpvchErzgxt7g0L10vOT93EyMw/E//ezZhB+O9 A9aHGJOBxk1klhJNzgfGT15JvKGxmZGFqYmpsZG5pRlpwkrivOot1oFCAumJJanZqakFqUXx RaU5qcWHGJk4OKUaGD05lblmRausm3nR6/CXcvu9B6q1jskcElh4Qj/i4zFL421yd+8/yJOd b38q+1rKU/47NVMObXn2N2KF/JGHL4rzipbnPfOW39W49S/r983rK1k6ekV3rff+fd7CO/um 2/xX/86t1DGznuSX82lv3/Glq+bMMWcSXfE6SYpv2pz1f9LPcD4MfzNDiaU4I9FQi7moOBEA NPS3LJUCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrAIsWRmVeSWpSXmKPExsVy+t9jAV2BO+8DDRp2qllMuj+BxeL7ri/s Fr0LrrJZbHp8jdVixvl9TBZPJ1xks1j4It5iyqLDrBaH37SzWhybsYTRgctj56y77B53ru1h 89i8pN6jb8sqRo/Pm+QCWKMaGG0yUhNTUosUUvOS81My89JtlbyD453jTc0MDHUNLS3MlRTy EnNTbZVcfAJ03TJzgI5SUihLzCkFCgUkFhcr6dthmhAa4qZrAdMYoesbEgTXY2SABhLWMGb0 /p/NXDBFqmLxuuAGxj+iXYycHBICJhI/n89lhbDFJC7cW88GYgsJLGKUuLLeuouRC8iezSSx 8f8tsASbgK7E7IPPGEFsEQFvicln/rKDFDELnGOUmDzpDDNIQljASeLDqkNgDSwCqhIz2h6C NfAKeEhcaW5gg9imKNH9bAKYzSngKTFj3neozR4SEw9+ZJ3AyLuAkWEVo2hqQXJBcVJ6rqFe cWJucWleul5yfu4mRnB8PZPawbiyweIQowAHoxIPb8Gsd4FCrIllxZW5hxglOJiVRHit5r8P FOJNSaysSi3Kjy8qzUktPsSYDHTVRGYp0eR8YOznlcQbGpuYmxqbWppYmJhZkiasJM57oNU6 UEggPbEkNTs1tSC1CGYLEwenVANjwaqJMpzipi/2uEU0XjK3P2Z9WUnqlWv7JjfByTtf8e2W lLOUqxCzKHn+yVN2hXrzyXpjidkvcqzfTUrfETT/7nQNls8L1nFcy83esEd7tW1OTGbWhqf+ Gw+KKi+tnb/suVljZers+g26EnwCcwwFmkrOamvNMZxUGDvT2nDjStna9fZVs7OUWIozEg21 mIuKEwHRJrIN8wIAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Adding sysmmu clock for mixer for exynos5250 SoC. It also adds aclk200_disp1 mux which is the real parent of the disp1 block (contains hdmi, mixer, sysmmu_mixer). Signed-off-by: Rahul Sharma --- Documentation/devicetree/bindings/clock/exynos5250-clock.txt | 1 + drivers/clk/samsung/clk-exynos5250.c | 7 ++++++- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt index 10b9f2a..d4eefcf 100644 --- a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt @@ -158,6 +158,7 @@ clock which they consume. dp 342 mixer 343 hdmi 345 + smmu_mixer 346 [Clock Muxes] diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c index 9579cfe..c727d9e 100644 --- a/drivers/clk/samsung/clk-exynos5250.c +++ b/drivers/clk/samsung/clk-exynos5250.c @@ -24,6 +24,7 @@ #define SRC_CORE1 0x4204 #define SRC_TOP0 0x10210 #define SRC_TOP2 0x10218 +#define SRC_TOP3 0x1021C #define SRC_GSCL 0x10220 #define SRC_DISP1_0 0x1022c #define SRC_MAU 0x10240 @@ -99,7 +100,7 @@ enum exynos5250_clks { spi2, i2s1, i2s2, pcm1, pcm2, pwm, spdif, ac97, hsi2c0, hsi2c1, hsi2c2, hsi2c3, chipid, sysreg, pmu, cmu_top, cmu_core, cmu_mem, tzpc0, tzpc1, tzpc2, tzpc3, tzpc4, tzpc5, tzpc6, tzpc7, tzpc8, tzpc9, hdmi_cec, mct, - wdt, rtc, tmu, fimd1, mie1, dsim0, dp, mixer, hdmi, + wdt, rtc, tmu, fimd1, mie1, dsim0, dp, mixer, hdmi, smmu_mixer, /* mux clocks */ mout_hdmi = 1024, @@ -172,6 +173,7 @@ PNAME(mout_mpll_user_p) = { "fin_pll", "sclk_mpll" }; PNAME(mout_bpll_user_p) = { "fin_pll", "sclk_bpll" }; PNAME(mout_aclk166_p) = { "sclk_cpll", "sclk_mpll_user" }; PNAME(mout_aclk200_p) = { "sclk_mpll_user", "sclk_bpll_user" }; +PNAME(mout_aclk200_disp1_sub_p) = { "fin_pll", "aclk200" }; PNAME(mout_hdmi_p) = { "div_hdmi_pixel", "sclk_hdmiphy" }; PNAME(mout_usb3_p) = { "sclk_mpll_user", "sclk_cpll" }; PNAME(mout_group1_p) = { "fin_pll", "fin_pll", "sclk_hdmi27m", @@ -227,6 +229,8 @@ struct samsung_mux_clock exynos5250_mux_clks[] __initdata = { MUX(none, "mout_aclk166", mout_aclk166_p, SRC_TOP0, 8, 1), MUX(none, "mout_aclk333", mout_aclk166_p, SRC_TOP0, 16, 1), MUX(none, "mout_aclk200", mout_aclk200_p, SRC_TOP0, 12, 1), + MUX(none, "mout_aclk200_disp1", mout_aclk200_disp1_sub_p, + SRC_TOP3, 4, 1), MUX(none, "mout_cam_bayer", mout_group1_p, SRC_GSCL, 12, 4), MUX(none, "mout_cam0", mout_group1_p, SRC_GSCL, 16, 4), MUX(none, "mout_cam1", mout_group1_p, SRC_GSCL, 20, 4), @@ -328,6 +332,7 @@ struct samsung_gate_clock exynos5250_gate_clks[] __initdata = { GATE(smmu_gscl1, "smmu_gscl1", "aclk266", GATE_IP_GSCL, 8, 0, 0), GATE(smmu_gscl2, "smmu_gscl2", "aclk266", GATE_IP_GSCL, 9, 0, 0), GATE(smmu_gscl3, "smmu_gscl3", "aclk266", GATE_IP_GSCL, 10, 0, 0), + GATE(smmu_mixer, "smmu_mixer", "mout_aclk200_disp1", GATE_IP_DISP1, 9, 0, 0), GATE(mfc, "mfc", "aclk333", GATE_IP_MFC, 0, 0, 0), GATE(smmu_mfcl, "smmu_mfcl", "aclk333", GATE_IP_MFC, 1, 0, 0), GATE(smmu_mfcr, "smmu_mfcr", "aclk333", GATE_IP_MFC, 2, 0, 0),