From patchwork Thu Jul 25 05:07:35 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rahul Sharma X-Patchwork-Id: 2833207 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 629BEC0319 for ; Thu, 25 Jul 2013 04:45:02 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7FCFD20182 for ; Thu, 25 Jul 2013 04:45:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 86BB2201F9 for ; Thu, 25 Jul 2013 04:45:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751759Ab3GYEpA (ORCPT ); Thu, 25 Jul 2013 00:45:00 -0400 Received: from mailout1.samsung.com ([203.254.224.24]:53599 "EHLO mailout1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751731Ab3GYEo7 (ORCPT ); Thu, 25 Jul 2013 00:44:59 -0400 Received: from epcpsbgr3.samsung.com (u143.gpu120.samsung.co.kr [203.254.230.143]) by mailout1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MQH00K8H6IGIMK0@mailout1.samsung.com> for linux-samsung-soc@vger.kernel.org; Thu, 25 Jul 2013 13:44:58 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.124]) by epcpsbgr3.samsung.com (EPCPMTA) with SMTP id BC.D1.03969.A4DA0F15; Thu, 25 Jul 2013 13:44:58 +0900 (KST) X-AuditID: cbfee68f-b7f436d000000f81-3b-51f0ad4a19ed Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id A6.86.31505.A4DA0F15; Thu, 25 Jul 2013 13:44:58 +0900 (KST) Received: from chromeserver-PowerEdge-T410.sisodomain.com ([107.108.73.106]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MQH004UK6IKUD00@mmp1.samsung.com>; Thu, 25 Jul 2013 13:44:57 +0900 (KST) From: Rahul Sharma To: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: kgene.kim@samsung.com, mturquette@linaro.org, inki.dae@samsung.com, s.nawrocki@samsung.com, thomas.abraham@linaro.org, joshi@samsung.com, r.sh.open@gmail.com, Rahul Sharma Subject: [PATCH v4 4/6] clk/exynos5250: add sclk_hdmiphy in the list of special clocks Date: Thu, 25 Jul 2013 10:37:35 +0530 Message-id: <1374728857-4208-5-git-send-email-rahul.sharma@samsung.com> X-Mailer: git-send-email 1.7.10.4 In-reply-to: <1374728857-4208-1-git-send-email-rahul.sharma@samsung.com> References: <1374728857-4208-1-git-send-email-rahul.sharma@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmplkeLIzCtJLcpLzFFi42JZI2JSo+u19kOgwdT1MhaT7k9gsfi+6wu7 Re+Cq2wWmx5fY7WYcX4fk8XTCRfZLBa+iLeYsugwq8XhN+2sFsdmLGF04PLYOesuu8eda3vY PDYvqffo27KK0ePzJrkA1igum5TUnMyy1CJ9uwSujIPvH7IXbBaoODZjJ3MD4yfeLkZODgkB E4nf844wQthiEhfurWfrYuTiEBJYyijxYM96VpiitU9esEAkFjFKrO3ogaqazSSxZvNVsCo2 AV2J2QefgY0SEfCWmHzmLztIEbPAOUaJyZPOMIMkhAUiJC7N3cQOYrMIqEr8eLqZBcTmFXCX OHCyhRlinaJE97MJbCA2p4CHxJItF8DqhYBqNs9dAjZUQmATu8SubVtYIAYJSHybfAjI5gBK yEpsOgA1R1Li4IobLBMYhRcwMqxiFE0tSC4oTkovMtYrTswtLs1L10vOz93ECIyC0/+e9e9g vHvA+hBjMtC4icxSosn5wCjKK4k3NDYzsjA1MTU2Mrc0I01YSZxXrcU6UEggPbEkNTs1tSC1 KL6oNCe1+BAjEwenVANjwqmn5muDZ57eelj4oN5rv3Bx49A9Sbff6kxWqvDf3fv0Nu/bAFXp KQa/Piqsub/KWXHn1AcNApeYW9fM6FUoL5qVzPqipOG3V9TdutWbg5UWZzmcF085r7PoaHfD M0HPaM1DXCv2yV2xeDx/RXv1m7vVwcvFOFeI7G5e7bFdJ5ExdF1X4ZnDSizFGYmGWsxFxYkA dFp4GZgCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrEIsWRmVeSWpSXmKPExsVy+t9jAV2vtR8CDTZ/FraYdH8Ci8X3XV/Y LXoXXGWz2PT4GqvFjPP7mCyeTrjIZrHwRbzFlEWHWS0Ov2lntTg2YwmjA5fHzll32T3uXNvD 5rF5Sb1H35ZVjB6fN8kFsEY1MNpkpCampBYppOYl56dk5qXbKnkHxzvHm5oZGOoaWlqYKynk Jeam2iq5+AToumXmAB2lpFCWmFMKFApILC5W0rfDNCE0xE3XAqYxQtc3JAiux8gADSSsYcw4 +P4he8FmgYpjM3YyNzB+4u1i5OSQEDCRWPvkBQuELSZx4d56ti5GLg4hgUWMEms7eqCc2UwS azZfZQWpYhPQlZh98BkjiC0i4C0x+cxfdpAiZoFzjBKTJ51hBkkIC0RIXJq7iR3EZhFQlfjx dDPYCl4Bd4kDJ1uYIdYpSnQ/m8AGYnMKeEgs2XIBrF4IqGbz3CXsExh5FzAyrGIUTS1ILihO Ss810itOzC0uzUvXS87P3cQIjrFn0jsYVzVYHGIU4GBU4uFd8f19oBBrYllxZe4hRgkOZiUR 3tiKD4FCvCmJlVWpRfnxRaU5qcWHGJOBrprILCWanA+M/7ySeENjE3NTY1NLEwsTM0vShJXE eQ+2WgcKCaQnlqRmp6YWpBbBbGHi4JRqYJRq0FjV8U3RMIlh3u+6Gd42wQatt0LPFGxd32Tm l/mpgtdqs+mzM6+TNxUU5j1TCJ9VnsbpFM9UJbHQ2DW54/IDFq5XOx4eelj+llEgRsf3AX+7 j3x80RlDheWFf9e+7Zi7UEZddLOyceY94WKmf3Vb90cvW9Rz2u/rVoaTmkUbei+0iH4OUGIp zkg01GIuKk4EAKDZO/j1AgAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP hdmi driver needs hdmiphy clock which is one of the parent for hdmi mux clock. This is required while changing the parent of mux clock. Signed-off-by: Rahul Sharma Conflicts: drivers/clk/samsung/clk-exynos5250.c --- Documentation/devicetree/bindings/clock/exynos5250-clock.txt | 1 + drivers/clk/samsung/clk-exynos5250.c | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt index b3dfcad..a489b5a 100644 --- a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt @@ -61,6 +61,7 @@ clock which they consume. sclk_spi2 156 div_i2s1 157 div_i2s2 158 + sclk_hdmiphy 159 [Peripheral Clock Gates] diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c index df44419..9579cfe 100644 --- a/drivers/clk/samsung/clk-exynos5250.c +++ b/drivers/clk/samsung/clk-exynos5250.c @@ -87,7 +87,7 @@ enum exynos5250_clks { sclk_mmc0, sclk_mmc1, sclk_mmc2, sclk_mmc3, sclk_sata, sclk_usb3, sclk_jpeg, sclk_uart0, sclk_uart1, sclk_uart2, sclk_uart3, sclk_pwm, sclk_audio1, sclk_audio2, sclk_spdif, sclk_spi0, sclk_spi1, sclk_spi2, - div_i2s1, div_i2s2, + div_i2s1, div_i2s2, sclk_hdmiphy, /* gate clocks */ gscl0 = 256, gscl1, gscl2, gscl3, gscl_wa, gscl_wb, smmu_gscl0, @@ -200,7 +200,7 @@ struct samsung_fixed_rate_clock exynos5250_fixed_rate_ext_clks[] __initdata = { /* fixed rate clocks generated inside the soc */ struct samsung_fixed_rate_clock exynos5250_fixed_rate_clks[] __initdata = { - FRATE(none, "sclk_hdmiphy", NULL, CLK_IS_ROOT, 24000000), + FRATE(sclk_hdmiphy, "sclk_hdmiphy", NULL, CLK_IS_ROOT, 24000000), FRATE(none, "sclk_hdmi27m", NULL, CLK_IS_ROOT, 27000000), FRATE(none, "sclk_dptxphy", NULL, CLK_IS_ROOT, 24000000), FRATE(none, "sclk_uhostphy", NULL, CLK_IS_ROOT, 48000000),