From patchwork Thu Jul 25 05:07:36 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rahul Sharma X-Patchwork-Id: 2833209 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id CB0CEC0319 for ; Thu, 25 Jul 2013 04:45:09 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id DE5B3201EF for ; Thu, 25 Jul 2013 04:45:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id DDCEF20182 for ; Thu, 25 Jul 2013 04:45:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752052Ab3GYEpH (ORCPT ); Thu, 25 Jul 2013 00:45:07 -0400 Received: from mailout1.samsung.com ([203.254.224.24]:53623 "EHLO mailout1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751731Ab3GYEpG (ORCPT ); Thu, 25 Jul 2013 00:45:06 -0400 Received: from epcpsbgr3.samsung.com (u143.gpu120.samsung.co.kr [203.254.230.143]) by mailout1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MQH00K8H6IGIMK0@mailout1.samsung.com> for linux-samsung-soc@vger.kernel.org; Thu, 25 Jul 2013 13:44:59 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.124]) by epcpsbgr3.samsung.com (EPCPMTA) with SMTP id AE.D1.03969.B4DA0F15; Thu, 25 Jul 2013 13:44:59 +0900 (KST) X-AuditID: cbfee68f-b7f436d000000f81-4c-51f0ad4b77d7 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 38.86.31505.B4DA0F15; Thu, 25 Jul 2013 13:44:59 +0900 (KST) Received: from chromeserver-PowerEdge-T410.sisodomain.com ([107.108.73.106]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MQH004UK6IKUD00@mmp1.samsung.com>; Thu, 25 Jul 2013 13:44:59 +0900 (KST) From: Rahul Sharma To: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: kgene.kim@samsung.com, mturquette@linaro.org, inki.dae@samsung.com, s.nawrocki@samsung.com, thomas.abraham@linaro.org, joshi@samsung.com, r.sh.open@gmail.com, Rahul Sharma Subject: [PATCH v4 5/6] clk/exynos5250: add clock for mixer sysmmu Date: Thu, 25 Jul 2013 10:37:36 +0530 Message-id: <1374728857-4208-6-git-send-email-rahul.sharma@samsung.com> X-Mailer: git-send-email 1.7.10.4 In-reply-to: <1374728857-4208-1-git-send-email-rahul.sharma@samsung.com> References: <1374728857-4208-1-git-send-email-rahul.sharma@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmphkeLIzCtJLcpLzFFi42JZI2JSo+u99kOgwfQ/hhaT7k9gsfi+6wu7 Re+Cq2wWmx5fY7WYcX4fk8XTCRfZLBa+iLeYsugwq8XhN+2sFsdmLGF04PLYOesuu8eda3vY PDYvqffo27KK0ePzJrkA1igum5TUnMyy1CJ9uwSujJOf/zIXTJGqaFy0mqmB8Y9oFyMnh4SA icSdifNZIWwxiQv31rN1MXJxCAksZZT4tnwXM0zR4gV/WCESixgl7uy4yA6SEBKYzSRxYKsG iM0moCsx++AzRhBbRMBbYvKZv+wgDcwC5xglJk86AzZJWMBJov3ZciYQm0VAVeLGphlgDbwC 7hLHtn5igtimKNH9bAIbiM0p4CGxZMsFqGXuEpvnLgEbKiGwjV3i+o9+ZohBAhLfJh9i6WLk AErISmw6AHW1pMTBFTdYJjAKL2BkWMUomlqQXFCclF5krFecmFtcmpeul5yfu4kRGAOn/z3r 38F494D1IcZkoHETmaVEk/OBMZRXEm9obGZkYWpiamxkbmlGmrCSOK9ai3WgkEB6Yklqdmpq QWpRfFFpTmrxIUYmDk6pBsa1F6se23VPsP9bzVYwU3yV/j7OHzrHP8gyX76nJLHhtHDb0uNK U16VPtpx851dnvWUOdt7J3TKB/G25Z85sZ6N74La/dXKb4485DyWbs4r82O9XfdMnrCCafuy pgc9PlN144K3Z2zZOclvXxPdW/ocX59qz3hzK0uq8+7NSbw3W9ZG8GxIevxdiaU4I9FQi7mo OBEAqxVtpZcCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrIIsWRmVeSWpSXmKPExsVy+t9jAV3vtR8CDY7M1bSYdH8Ci8X3XV/Y LXoXXGWz2PT4GqvFjPP7mCyeTrjIZrHwRbzFlEWHWS0Ov2lntTg2YwmjA5fHzll32T3uXNvD 5rF5Sb1H35ZVjB6fN8kFsEY1MNpkpCampBYppOYl56dk5qXbKnkHxzvHm5oZGOoaWlqYKynk Jeam2iq5+AToumXmAB2lpFCWmFMKFApILC5W0rfDNCE0xE3XAqYxQtc3JAiux8gADSSsYcw4 +fkvc8EUqYrGRauZGhj/iHYxcnJICJhILF7whxXCFpO4cG89WxcjF4eQwCJGiTs7LrKDJIQE ZjNJHNiqAWKzCehKzD74jBHEFhHwlph85i87SAOzwDlGicmTzjCDJIQFnCTany1nArFZBFQl bmyaAdbAK+AucWzrJyaIbYoS3c8msIHYnAIeEku2XIBa5i6xee4S9gmMvAsYGVYxiqYWJBcU J6XnGukVJ+YWl+al6yXn525iBEfYM+kdjKsaLA4xCnAwKvHwrvj+PlCINbGsuDL3EKMEB7OS CG9sxYdAId6UxMqq1KL8+KLSnNTiQ4zJQFdNZJYSTc4HRn9eSbyhsYm5qbGppYmFiZklacJK 4rwHW60DhQTSE0tSs1NTC1KLYLYwcXBKNTCucpnk7JWgIeHDdN3V2X/bBVMnTrnVZ7g4T+8/ clWVK8bzcWOM5Z7+J8cl5U4f/rj2r6zliVPNq0/s+Hq0/9j5rU5aeY+Svaqmrl/HLn5y7u93 03pUJ0t3c1xznFVuvcXMx4VRINtsS26R2M+jv97n+MsFcXNuTsifF+gcKRGg66fO4sTmfUuJ pTgj0VCLuag4EQBz+koY9AIAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Adding sysmmu clock for mixer for exynos5250 SoC. It also adds aclk200_disp1 mux which is the real parent of the disp1 block (contains hdmi, mixer, sysmmu_mixer). Signed-off-by: Rahul Sharma --- Documentation/devicetree/bindings/clock/exynos5250-clock.txt | 1 + drivers/clk/samsung/clk-exynos5250.c | 7 ++++++- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt index a489b5a..84e098f 100644 --- a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt @@ -158,6 +158,7 @@ clock which they consume. dp 342 mixer 343 hdmi 344 + smmu_mixer 345 [Clock Muxes] diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c index 9579cfe..c727d9e 100644 --- a/drivers/clk/samsung/clk-exynos5250.c +++ b/drivers/clk/samsung/clk-exynos5250.c @@ -24,6 +24,7 @@ #define SRC_CORE1 0x4204 #define SRC_TOP0 0x10210 #define SRC_TOP2 0x10218 +#define SRC_TOP3 0x1021C #define SRC_GSCL 0x10220 #define SRC_DISP1_0 0x1022c #define SRC_MAU 0x10240 @@ -99,7 +100,7 @@ enum exynos5250_clks { spi2, i2s1, i2s2, pcm1, pcm2, pwm, spdif, ac97, hsi2c0, hsi2c1, hsi2c2, hsi2c3, chipid, sysreg, pmu, cmu_top, cmu_core, cmu_mem, tzpc0, tzpc1, tzpc2, tzpc3, tzpc4, tzpc5, tzpc6, tzpc7, tzpc8, tzpc9, hdmi_cec, mct, - wdt, rtc, tmu, fimd1, mie1, dsim0, dp, mixer, hdmi, + wdt, rtc, tmu, fimd1, mie1, dsim0, dp, mixer, hdmi, smmu_mixer, /* mux clocks */ mout_hdmi = 1024, @@ -172,6 +173,7 @@ PNAME(mout_mpll_user_p) = { "fin_pll", "sclk_mpll" }; PNAME(mout_bpll_user_p) = { "fin_pll", "sclk_bpll" }; PNAME(mout_aclk166_p) = { "sclk_cpll", "sclk_mpll_user" }; PNAME(mout_aclk200_p) = { "sclk_mpll_user", "sclk_bpll_user" }; +PNAME(mout_aclk200_disp1_sub_p) = { "fin_pll", "aclk200" }; PNAME(mout_hdmi_p) = { "div_hdmi_pixel", "sclk_hdmiphy" }; PNAME(mout_usb3_p) = { "sclk_mpll_user", "sclk_cpll" }; PNAME(mout_group1_p) = { "fin_pll", "fin_pll", "sclk_hdmi27m", @@ -227,6 +229,8 @@ struct samsung_mux_clock exynos5250_mux_clks[] __initdata = { MUX(none, "mout_aclk166", mout_aclk166_p, SRC_TOP0, 8, 1), MUX(none, "mout_aclk333", mout_aclk166_p, SRC_TOP0, 16, 1), MUX(none, "mout_aclk200", mout_aclk200_p, SRC_TOP0, 12, 1), + MUX(none, "mout_aclk200_disp1", mout_aclk200_disp1_sub_p, + SRC_TOP3, 4, 1), MUX(none, "mout_cam_bayer", mout_group1_p, SRC_GSCL, 12, 4), MUX(none, "mout_cam0", mout_group1_p, SRC_GSCL, 16, 4), MUX(none, "mout_cam1", mout_group1_p, SRC_GSCL, 20, 4), @@ -328,6 +332,7 @@ struct samsung_gate_clock exynos5250_gate_clks[] __initdata = { GATE(smmu_gscl1, "smmu_gscl1", "aclk266", GATE_IP_GSCL, 8, 0, 0), GATE(smmu_gscl2, "smmu_gscl2", "aclk266", GATE_IP_GSCL, 9, 0, 0), GATE(smmu_gscl3, "smmu_gscl3", "aclk266", GATE_IP_GSCL, 10, 0, 0), + GATE(smmu_mixer, "smmu_mixer", "mout_aclk200_disp1", GATE_IP_DISP1, 9, 0, 0), GATE(mfc, "mfc", "aclk333", GATE_IP_MFC, 0, 0, 0), GATE(smmu_mfcl, "smmu_mfcl", "aclk333", GATE_IP_MFC, 1, 0, 0), GATE(smmu_mfcr, "smmu_mfcr", "aclk333", GATE_IP_MFC, 2, 0, 0),