From patchwork Mon Aug 26 09:13:00 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rahul Sharma X-Patchwork-Id: 2849438 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 7D5019F271 for ; Mon, 26 Aug 2013 08:51:23 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B7AF020155 for ; Mon, 26 Aug 2013 08:51:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 77577201F6 for ; Mon, 26 Aug 2013 08:51:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756682Ab3HZIvP (ORCPT ); Mon, 26 Aug 2013 04:51:15 -0400 Received: from mailout3.samsung.com ([203.254.224.33]:53559 "EHLO mailout3.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756677Ab3HZIvM (ORCPT ); Mon, 26 Aug 2013 04:51:12 -0400 Received: from epcpsbgr5.samsung.com (u145.gpu120.samsung.co.kr [203.254.230.145]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MS4005K0R93Q3X0@mailout3.samsung.com> for linux-samsung-soc@vger.kernel.org; Mon, 26 Aug 2013 17:51:12 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.122]) by epcpsbgr5.samsung.com (EPCPMTA) with SMTP id 95.4C.29948.FF61B125; Mon, 26 Aug 2013 17:51:11 +0900 (KST) X-AuditID: cbfee691-b7f4a6d0000074fc-66-521b16ff83d7 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 71.2F.05832.FF61B125; Mon, 26 Aug 2013 17:51:11 +0900 (KST) Received: from chromeserver-PowerEdge-T410.sisodomain.com ([107.108.73.106]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MS4003AKR90VJE0@mmp1.samsung.com>; Mon, 26 Aug 2013 17:51:11 +0900 (KST) From: Rahul Sharma To: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: mturquette@linaro.org, kgene.kim@samsung.com, inki.dae@samsung.com, s.nawrocki@samsung.com, thomas.abraham@linaro.org, tomasz.figa@gmail.com, joshi@samsung.com, r.sh.open@gmail.com, Rahul Sharma Subject: [PATCH v3 2/5] clk/exynos5420: add gate clock for mixer sysmmu Date: Mon, 26 Aug 2013 14:43:00 +0530 Message-id: <1377508383-15185-3-git-send-email-rahul.sharma@samsung.com> X-Mailer: git-send-email 1.7.10.4 In-reply-to: <1377508383-15185-1-git-send-email-rahul.sharma@samsung.com> References: <1377508383-15185-1-git-send-email-rahul.sharma@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupkkeLIzCtJLcpLzFFi42JZI2JSpftfTDrI4MADC4tJ9yewWHzf9YXd onfBVTaLTY+vsVrMOL+PyeLphItsFgtfxFtMWXSY1eLwm3ZWi2MzljBarNr1h9GB22PnrLvs Hneu7WHz2Lyk3qNvyypGj8+b5AJYo7hsUlJzMstSi/TtErgyXv+8wFzwna9iX8c0tgbGUzxd jJwcEgImEhMnb2SGsMUkLtxbz9bFyMUhJLCUUeLFt93MMEV3tzcwQSQWMUq0zNwG5cxmkmg8 uoUJpIpNQFdi9sFnjCC2iIC3xOQzf9lBipgFnjJK3FnRzwaSEBZwl7j8fzdQgoODRUBV4k+n L0iYV8BDYmnzC0aIbYoS3c8mgJVzCnhKXL5zhxXEFgKqudfRxgoyU0JgF7tE05SdYEUsAgIS 3yYfYgGZKSEgK7HpANTVkhIHV9xgmcAovICRYRWjaGpBckFxUnqRqV5xYm5xaV66XnJ+7iZG YDSc/vds4g7G+wesDzEmA42byCwlmpwPjKa8knhDYzMjC1MTU2Mjc0sz0oSVxHnVW6wDhQTS E0tSs1NTC1KL4otKc1KLDzEycXBKNTDyFlpcr/dkPC76Zs7O6Venam0+UvngWdi3BC3ZP+9b vr7Nnm9f9pBBYcId4Uva1w86PJ5YsOR64olZZxKDHaILgmL/1t3ctNL03I7HnV9zD5/wYRVb 2bTv4wWtCbtcGn+XL1LlUvJwMr0VFOZlP+GVh0XUgr3/5iyZPmPJUQvW7DniBQedFN9NUWIp zkg01GIuKk4EAC4VV3ucAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrGIsWRmVeSWpSXmKPExsVy+t9jAd3/YtJBBt+nGlpMuj+BxeL7ri/s Fr0LrrJZbHp8jdVixvl9TBZPJ1xks1j4It5iyqLDrBaH37SzWhybsYTRYtWuP4wO3B47Z91l 97hzbQ+bx+Yl9R59W1YxenzeJBfAGtXAaJORmpiSWqSQmpecn5KZl26r5B0c7xxvamZgqGto aWGupJCXmJtqq+TiE6DrlpkDdJmSQlliTilQKCCxuFhJ3w7ThNAQN10LmMYIXd+QILgeIwM0 kLCGMeP1zwvMBd/5KvZ1TGNrYDzF08XIySEhYCJxd3sDE4QtJnHh3nq2LkYuDiGBRYwSLTO3 MUE4s5kkGo9uAatiE9CVmH3wGSOILSLgLTH5zF92kCJmgaeMEndW9LOBJIQF3CUu/98NlODg YBFQlfjT6QsS5hXwkFja/IIRYpuiRPezCWDlnAKeEpfv3GEFsYWAau51tLFOYORdwMiwilE0 tSC5oDgpPddIrzgxt7g0L10vOT93EyM41p5J72Bc1WBxiFGAg1GJhzeATTpIiDWxrLgy9xCj BAezkgivuShQiDclsbIqtSg/vqg0J7X4EGMy0FETmaVEk/OBaSCvJN7Q2MTc1NjU0sTCxMyS NGElcd6DrdaBQgLpiSWp2ampBalFMFuYODilGhitq1Tdv0xfP2334wvys+eGNxVIbD7jsIWr 77b7L6XInxk5X912WN999rxT70lSjfDiea/FjnDWbbNK36yqpPbbkjN43/4IlhszTm6oM9Db OCV2+SKzuH1e0wJbHwqcqpGMX7pr+75It0tbNP5+mXYj8olxsfzZS1FtAVsW9NZd2GFgdTlb L5lJiaU4I9FQi7moOBEAjkVz+fkCAAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-9.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Adding sysmmu clock for mixer for exynos5420. Signed-off-by: Rahul Sharma --- Documentation/devicetree/bindings/clock/exynos5420-clock.txt | 1 + drivers/clk/samsung/clk-exynos5420.c | 3 ++- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/clock/exynos5420-clock.txt b/Documentation/devicetree/bindings/clock/exynos5420-clock.txt index 596a368..5758a69 100644 --- a/Documentation/devicetree/bindings/clock/exynos5420-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos5420-clock.txt @@ -180,6 +180,7 @@ clock which they consume. fimc_lite3 495 aclk_g3d 500 g3d 501 + smmu_mixer 502 Example 1: An example of a clock controller node is listed below. diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c index a86cadc..4e0c13e 100644 --- a/drivers/clk/samsung/clk-exynos5420.c +++ b/drivers/clk/samsung/clk-exynos5420.c @@ -138,7 +138,7 @@ enum exynos5420_clks { aclk300_gscl = 460, smmu_gscl0, smmu_gscl1, gscl_wa, gscl_wb, gscl0, gscl1, clk_3aa, aclk266_g2d = 470, sss, slim_sss, mdma0, aclk333_g2d = 480, g2d, aclk333_432_gscl = 490, smmu_3aa, smmu_fimcl0, - smmu_fimcl1, smmu_fimcl3, fimc_lite3, aclk_g3d = 500, g3d, + smmu_fimcl1, smmu_fimcl3, fimc_lite3, aclk_g3d = 500, g3d, smmu_mixer, nr_clks, }; @@ -725,6 +725,7 @@ static struct samsung_gate_clock exynos5420_gate_clks[] __initdata = { GATE(smmu_mscl0, "smmu_mscl0", "aclk400_mscl", GATE_IP_MSCL, 8, 0, 0), GATE(smmu_mscl1, "smmu_mscl1", "aclk400_mscl", GATE_IP_MSCL, 9, 0, 0), GATE(smmu_mscl2, "smmu_mscl2", "aclk400_mscl", GATE_IP_MSCL, 10, 0, 0), + GATE(smmu_mixer, "smmu_mixer", "aclk200_disp1", GATE_IP_DISP1, 9, 0, 0), }; static struct samsung_pll_clock exynos5420_plls[nr_plls] __initdata = {