From patchwork Thu Aug 29 05:37:05 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rahul Sharma X-Patchwork-Id: 2851130 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id AA580BF546 for ; Thu, 29 Aug 2013 05:15:46 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CE1852024A for ; Thu, 29 Aug 2013 05:15:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id DC12B20225 for ; Thu, 29 Aug 2013 05:15:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752920Ab3H2FPo (ORCPT ); Thu, 29 Aug 2013 01:15:44 -0400 Received: from mailout3.samsung.com ([203.254.224.33]:52168 "EHLO mailout3.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753376Ab3H2FPn (ORCPT ); Thu, 29 Aug 2013 01:15:43 -0400 Received: from epcpsbgr3.samsung.com (u143.gpu120.samsung.co.kr [203.254.230.143]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MSA007LH199PC70@mailout3.samsung.com> for linux-samsung-soc@vger.kernel.org; Thu, 29 Aug 2013 14:15:32 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [172.20.52.124]) by epcpsbgr3.samsung.com (EPCPMTA) with SMTP id 2C.C2.22755.4F8DE125; Thu, 29 Aug 2013 14:15:32 +0900 (KST) X-AuditID: cbfee68f-b7f656d0000058e3-49-521ed8f40dac Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id EE.39.09055.4F8DE125; Thu, 29 Aug 2013 14:15:32 +0900 (KST) Received: from chromeserver-PowerEdge-T410.sisodomain.com ([107.108.73.106]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MSA00BFW19BFDJ0@mmp1.samsung.com>; Thu, 29 Aug 2013 14:15:31 +0900 (KST) From: Rahul Sharma To: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: mturquette@linaro.org, kgene.kim@samsung.com, inki.dae@samsung.com, s.nawrocki@samsung.com, thomas.abraham@linaro.org, tomasz.figa@gmail.com, joshi@samsung.com, r.sh.open@gmail.com, Rahul Sharma Subject: [PATCH v4 1/5] clk/exynos5420: add sclk_hdmiphy to the list of special clocks Date: Thu, 29 Aug 2013 11:07:05 +0530 Message-id: <1377754629-31465-2-git-send-email-rahul.sharma@samsung.com> X-Mailer: git-send-email 1.7.10.4 In-reply-to: <1377754629-31465-1-git-send-email-rahul.sharma@samsung.com> References: <1377754629-31465-1-git-send-email-rahul.sharma@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupgkeLIzCtJLcpLzFFi42JZI2JSo/vlhlyQwYWtAhaT7k9gsfi+6wu7 Re+Cq2wWmx5fY7WYcX4fk8XTCRfZLBa+iLeYsugwq8XhN+2sFsdmLGG0WLXrD6MDt8fOWXfZ Pe5c28PmsXlJvUffllWMHp83yQWwRnHZpKTmZJalFunbJXBl3Lnym6VgiUBFy7G8Bsa3vF2M nBwSAiYS2z7OZ4GwxSQu3FvP1sXIxSEksJRR4sSuLnaYohV7dzBCJBYxSux5dZIdwpnNJHFv 20NWkCo2AV2J2QefMYLYIgLeEpPP/AUrYhZ4yihxZ0U/G0hCWCBCYt32p2BFLAKqEs1n34Ht 5hXwkFi1fSETxDpFie5nE4DqOTg4BTwlNq0NAwkLAZXs+N3EAjJTQmAXu8T9TYuZIOYISHyb fIgFpF5CQFZi0wFmiDGSEgdX3GCZwCi8gJFhFaNoakFyQXFSepGxXnFibnFpXrpecn7uJkZg LJz+96x/B+PdA9aHGJOBxk1klhJNzgfGUl5JvKGxmZGFqYmpsZG5pRlpwkrivGot1oFCAumJ JanZqakFqUXxRaU5qcWHGJk4OKUaGE8y2MXd87QvkX/aWWz37fixet+HSzc9f+Jwi9fBuUxO 7Vq/z8rCR99krMseZETfbFP6nNYuNachSMnkbomH8+lLbjGfTlW9LP0XvvAi64tT6pkH99eo zb7Ye9fwS8uT9nexaqlRXNGyn1smqUhyLp3XKK3/zFOKUYXnzPnOg12vvtZefyo4V4mlOCPR UIu5qDgRAEk7o5KbAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrKIsWRmVeSWpSXmKPExsVy+t9jAd0vN+SCDC4eY7eYdH8Ci8X3XV/Y LXoXXGWz2PT4GqvFjPP7mCyeTrjIZrHwRbzFlEWHWS0Ov2lntTg2YwmjxapdfxgduD12zrrL 7nHn2h42j81L6j36tqxi9Pi8SS6ANaqB0SYjNTEltUghNS85PyUzL91WyTs43jne1MzAUNfQ 0sJcSSEvMTfVVsnFJ0DXLTMH6DIlhbLEnFKgUEBicbGSvh2mCaEhbroWMI0Rur4hQXA9RgZo IGENY8adK79ZCpYIVLQcy2tgfMvbxcjJISFgIrFi7w5GCFtM4sK99WxdjFwcQgKLGCX2vDrJ DuHMZpK4t+0hK0gVm4CuxOyDz8A6RAS8JSaf+QtWxCzwlFHizop+NpCEsECExLrtT8GKWARU JZrPvmMBsXkFPCRWbV/IBLFOUaL72QSgeg4OTgFPiU1rw0DCQkAlO343sUxg5F3AyLCKUTS1 ILmgOCk911CvODG3uDQvXS85P3cTIzjSnkntYFzZYHGIUYCDUYmHN+K3bJAQa2JZcWXuIUYJ DmYlEd5T++SChHhTEiurUovy44tKc1KLDzEmAx01kVlKNDkfmATySuINjU3MTY1NLU0sTMws SRNWEuc90GodKCSQnliSmp2aWpBaBLOFiYNTqoGRc/n3QwcXaK0NENW6s7z4UXZCCafEv1ts p+fEPGHLsmIIn2u+TMgqZ/XltKqQ196SXf9l9rl5iAn0dMyQvczT8WjrWp2FCVfPFzV7JDIE uuw7umDzPYZvKjJ/+4O/eEcJfw7Z/WPx5zzJnZU32sovzNnRaMhbIz57XrSa86oSt72S3XMa 70orsRRnJBpqMRcVJwIA+WwlI/gCAAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-9.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add sclk_hdmiphy to the list of exposed clocks. This is required by hdmi driver to change the parent of hdmi clock. Signed-off-by: Rahul Sharma --- Documentation/devicetree/bindings/clock/exynos5420-clock.txt | 1 + drivers/clk/samsung/clk-exynos5420.c | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/exynos5420-clock.txt b/Documentation/devicetree/bindings/clock/exynos5420-clock.txt index 9bcc4b1..596a368 100644 --- a/Documentation/devicetree/bindings/clock/exynos5420-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos5420-clock.txt @@ -59,6 +59,7 @@ clock which they consume. sclk_pwm 155 sclk_gscl_wa 156 sclk_gscl_wb 157 + sclk_hdmiphy 158 [Peripheral Clock Gates] diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c index e035fd0..a86cadc 100644 --- a/drivers/clk/samsung/clk-exynos5420.c +++ b/drivers/clk/samsung/clk-exynos5420.c @@ -120,7 +120,7 @@ enum exynos5420_clks { sclk_i2s2, sclk_pcm1, sclk_pcm2, sclk_spdif, sclk_hdmi, sclk_pixel, sclk_dp1, sclk_mipi1, sclk_fimd1, sclk_maudio0, sclk_maupcm0, sclk_usbd300, sclk_usbd301, sclk_usbphy300, sclk_usbphy301, sclk_unipro, - sclk_pwm, sclk_gscl_wa, sclk_gscl_wb, + sclk_pwm, sclk_gscl_wa, sclk_gscl_wb, sclk_hdmiphy, /* gate clocks */ aclk66_peric = 256, uart0, uart1, uart2, uart3, i2c0, i2c1, i2c2, i2c3, @@ -297,7 +297,7 @@ static struct samsung_fixed_rate_clock exynos5420_fixed_rate_ext_clks[] __initda /* fixed rate clocks generated inside the soc */ static struct samsung_fixed_rate_clock exynos5420_fixed_rate_clks[] __initdata = { - FRATE(none, "sclk_hdmiphy", NULL, CLK_IS_ROOT, 24000000), + FRATE(sclk_hdmiphy, "sclk_hdmiphy", NULL, CLK_IS_ROOT, 24000000), FRATE(none, "sclk_pwi", NULL, CLK_IS_ROOT, 24000000), FRATE(none, "sclk_usbh20", NULL, CLK_IS_ROOT, 48000000), FRATE(none, "mphy_refclk_ixtal24", NULL, CLK_IS_ROOT, 48000000),