From patchwork Thu Aug 29 05:37:09 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rahul Sharma X-Patchwork-Id: 2851133 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 6CEC7BF546 for ; Thu, 29 Aug 2013 05:15:50 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 9088C20225 for ; Thu, 29 Aug 2013 05:15:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id AA80B20237 for ; Thu, 29 Aug 2013 05:15:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753548Ab3H2FPr (ORCPT ); Thu, 29 Aug 2013 01:15:47 -0400 Received: from mailout3.samsung.com ([203.254.224.33]:52168 "EHLO mailout3.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752337Ab3H2FPq (ORCPT ); Thu, 29 Aug 2013 01:15:46 -0400 Received: from epcpsbgr5.samsung.com (u145.gpu120.samsung.co.kr [203.254.230.145]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MSA00EJ5197BT30@mailout3.samsung.com> for linux-samsung-soc@vger.kernel.org; Thu, 29 Aug 2013 14:15:39 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.124]) by epcpsbgr5.samsung.com (EPCPMTA) with SMTP id C6.FC.29948.BF8DE125; Thu, 29 Aug 2013 14:15:39 +0900 (KST) X-AuditID: cbfee691-b7f4a6d0000074fc-9f-521ed8fbb889 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 8D.50.05832.BF8DE125; Thu, 29 Aug 2013 14:15:39 +0900 (KST) Received: from chromeserver-PowerEdge-T410.sisodomain.com ([107.108.73.106]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MSA00BFW19BFDJ0@mmp1.samsung.com>; Thu, 29 Aug 2013 14:15:39 +0900 (KST) From: Rahul Sharma To: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: mturquette@linaro.org, kgene.kim@samsung.com, inki.dae@samsung.com, s.nawrocki@samsung.com, thomas.abraham@linaro.org, tomasz.figa@gmail.com, joshi@samsung.com, r.sh.open@gmail.com, Rahul Sharma Subject: [PATCH v4 5/5] clk/exynos5420: assign dout_pixel id to pixel clock divider Date: Thu, 29 Aug 2013 11:07:09 +0530 Message-id: <1377754629-31465-6-git-send-email-rahul.sharma@samsung.com> X-Mailer: git-send-email 1.7.10.4 In-reply-to: <1377754629-31465-1-git-send-email-rahul.sharma@samsung.com> References: <1377754629-31465-1-git-send-email-rahul.sharma@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmpnkeLIzCtJLcpLzFFi42JZI2JSo/v7hlyQwdEl8haT7k9gsfi+6wu7 Re+Cq2wWmx5fY7WYcX4fk8XTCRfZLBa+iLeYsugwq8XhN+2sFsdmLGG0WLXrD6MDt8fOWXfZ Pe5c28PmsXlJvUffllWMHp83yQWwRnHZpKTmZJalFunbJXBlTDw0ibngGF9F85Q3rA2MXTxd jJwcEgImEk0zlzJB2GISF+6tZwOxhQSWMkrselwIU9PQ9xgqvohR4tv3qC5GLiB7NpPE6R8H WEESbAK6ErMPPmMEsUUEvCUmn/nLDlLELPCUUeLOin6wbmGBUImby/+BbWMRUJVYefwdO4jN K+AhcfTtH2aIbYoS3c8mANVzcHAKeEpsWhsGsdhDYsfvJhaQmRICu9glJqz5zw4xR0Di2+RD LCD1EgKyEpsOQI2RlDi44gbLBEbhBYwMqxhFUwuSC4qT0otM9YoTc4tL89L1kvNzNzECI+H0 v2cTdzDeP2B9iDEZaNxEZinR5HxgJOWVxBsamxlZmJqYGhuZW5qRJqwkzqveYh0oJJCeWJKa nZpakFoUX1Sak1p8iJGJg1OqgXETw14hgZzUyfNZ+VQ77vqvcuqcfOimU998sezjS7oWuQiL hU9qe5vUum+C1y6pWwuXbQ/ocL/Hfyb/WujP7PthS05yPlS6uzTx2+Oy75GfnjE3KbdtWusg /WHFx8d+4nc3LNJpPeG43bNzSpKWmNT0JapZRarX9Po7pjrt8r3y5G651/wgJQklluKMREMt 5qLiRADzEHs9mgIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrKIsWRmVeSWpSXmKPExsVy+t9jAd3fN+SCDH6+E7OYdH8Ci8X3XV/Y LXoXXGWz2PT4GqvFjPP7mCyeTrjIZrHwRbzFlEWHWS0Ov2lntTg2YwmjxapdfxgduD12zrrL 7nHn2h42j81L6j36tqxi9Pi8SS6ANaqB0SYjNTEltUghNS85PyUzL91WyTs43jne1MzAUNfQ 0sJcSSEvMTfVVsnFJ0DXLTMH6DIlhbLEnFKgUEBicbGSvh2mCaEhbroWMI0Rur4hQXA9RgZo IGENY8bEQ5OYC47xVTRPecPawNjF08XIySEhYCLR0PeYDcIWk7hwbz2YLSSwiFHi2/eoLkYu IHs2k8TpHwdYQRJsAroSsw8+YwSxRQS8JSaf+csOUsQs8JRR4s6KfrBuYYFQiZvL/zGB2CwC qhIrj79jB7F5BTwkjr79wwyxTVGi+9kEoHoODk4BT4lNa8MgFntI7PjdxDKBkXcBI8MqRtHU guSC4qT0XCO94sTc4tK8dL3k/NxNjOBIeya9g3FVg8UhRgEORiUe3ojfskFCrIllxZW5hxgl OJiVRHhP7ZMLEuJNSaysSi3Kjy8qzUktPsSYDHTURGYp0eR8YBLIK4k3NDYxNzU2tTSxMDGz JE1YSZz3YKt1oJBAemJJanZqakFqEcwWJg5OqQZG//u5T9bPLvizkL9KKLN9zvoMhZM3upi2 dwncuZXmMVcx/8bE9mP/fs+V+vMwr6x49X22c6o2P8V93y5cfLpq2Z9KjytTJkQIV9mnSyz+ W+PC9PRQ+f5vf+zzK55LKgWv6Z8W+Cfq54+G9/HxPzlCA9YIb20O2Hrq2bXERb6sT0SZbtyN qTM4pMRSnJFoqMVcVJwIAFnmYlH4AgAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-9.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP dout_pixel is a new ID allocated for pixel clock divider. It is queried in the driver to pass as the parent to hdmi clock while switching between parents. Signed-off-by: Rahul Sharma --- Documentation/devicetree/bindings/clock/exynos5420-clock.txt | 5 +++++ drivers/clk/samsung/clk-exynos5420.c | 5 ++++- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/clock/exynos5420-clock.txt b/Documentation/devicetree/bindings/clock/exynos5420-clock.txt index 343430b..32aa34e 100644 --- a/Documentation/devicetree/bindings/clock/exynos5420-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos5420-clock.txt @@ -187,6 +187,11 @@ clock which they consume. mout_hdmi 640 + Divider ID + ---------------------------- + + dout_pixel 768 + Example 1: An example of a clock controller node is listed below. clock: clock-controller@0x10010000 { diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c index 78465a5..48c4a93 100644 --- a/drivers/clk/samsung/clk-exynos5420.c +++ b/drivers/clk/samsung/clk-exynos5420.c @@ -143,6 +143,9 @@ enum exynos5420_clks { /* mux clocks */ mout_hdmi = 640, + /* divider clocks */ + dout_pixel = 768, + nr_clks, }; @@ -463,7 +466,7 @@ static struct samsung_div_clock exynos5420_div_clks[] __initdata = { DIV(none, "dout_fimd1", "mout_fimd1", DIV_DISP10, 0, 4), DIV(none, "dout_mipi1", "mout_mipi1", DIV_DISP10, 16, 8), DIV(none, "dout_dp1", "mout_dp1", DIV_DISP10, 24, 4), - DIV(none, "dout_hdmi_pixel", "mout_pixel", DIV_DISP10, 28, 4), + DIV(dout_pixel, "dout_hdmi_pixel", "mout_pixel", DIV_DISP10, 28, 4), /* Audio Block */ DIV(none, "dout_maudio0", "mout_maudio0", DIV_MAU, 20, 4),