From patchwork Thu Sep 5 09:24:46 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chander Kashyap X-Patchwork-Id: 2853987 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 3D093C0AB5 for ; Thu, 5 Sep 2013 09:25:10 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 35AE32021A for ; Thu, 5 Sep 2013 09:25:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 161612039F for ; Thu, 5 Sep 2013 09:25:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1763559Ab3IEJZH (ORCPT ); Thu, 5 Sep 2013 05:25:07 -0400 Received: from mail-pa0-f45.google.com ([209.85.220.45]:61536 "EHLO mail-pa0-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1763464Ab3IEJZG (ORCPT ); Thu, 5 Sep 2013 05:25:06 -0400 Received: by mail-pa0-f45.google.com with SMTP id bg4so1656566pad.32 for ; Thu, 05 Sep 2013 02:25:06 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=DyewS7vx6Vz6HhLA4N/MYAJlVTRzvUk1HAtLNgfZi8k=; b=AIQyc5EsgcxEfui07CMGVDGUUNDaqzSP3HLF3CNP3xzRH9EDEnGMi5dPVw2T+4xmA/ d79bze/NswvSiJEZEjTtGuUWU/1OYfJGgmcc6l79+SkDqjT95g5treUqm7aHJYDaWl2J +NreX4z5CIzuzJPQZAkTzGO+h/oFaafsewpWHm/TMlZYWn5EaqJ4hiO1xGhUY9xC2zil EkMwGRzlyt58QVGRpmL4AojMKic01xDp28/akaZXfrna80eMsinpBAVAhQO3NZZ3O7ip 8QUsRcUWHwBesRTFwKkoLggGMnJAmm7NIwz8XsVG1J3SZiFi+EO6X388ggmIifmg6BOu TTww== X-Gm-Message-State: ALoCoQnmsVpbp9YdUpwFWHo0dZxqVbLGJA7r8DNPGUUxrsqBxnzfAXpU9PvC93DpCCYrejXz70p+ X-Received: by 10.68.222.99 with SMTP id ql3mr8101070pbc.132.1378373105175; Thu, 05 Sep 2013 02:25:05 -0700 (PDT) Received: from localhost.localdomain ([115.113.119.130]) by mx.google.com with ESMTPSA id xs1sm36650304pac.7.1969.12.31.16.00.00 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 05 Sep 2013 02:25:04 -0700 (PDT) From: Chander Kashyap To: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Cc: kgene.kim@samsung.com, thomas.abraham@linaro.org, Chander Kashyap Subject: [PATCH 2/2] arm: dt: Exynos5420: populate cpu node enteries to 8 cpus Date: Thu, 5 Sep 2013 14:54:46 +0530 Message-Id: <1378373086-30676-3-git-send-email-chander.kashyap@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1378373086-30676-1-git-send-email-chander.kashyap@linaro.org> References: <1378373086-30676-1-git-send-email-chander.kashyap@linaro.org> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-9.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Exynos5420 is octacore SoC from samsung. Hence populate all the cpu node enteries. Signed-off-by: Chander Kashyap --- arch/arm/boot/dts/exynos5420.dtsi | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index e97c87b..59489f6 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -57,6 +57,34 @@ reg = <0x3>; clock-frequency = <1800000000>; }; + + cpu4: cpu@4 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x100>; + clock-frequency = <1000000000>; + }; + + cpu5: cpu@5 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x101>; + clock-frequency = <1000000000>; + }; + + cpu6: cpu@6 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x102>; + clock-frequency = <1000000000>; + }; + + cpu7: cpu@7 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x103>; + clock-frequency = <1000000000>; + }; }; clock: clock-controller@0x10010000 {