From patchwork Thu Sep 5 12:36:31 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrzej Hajda X-Patchwork-Id: 2854090 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id D1C559F3DC for ; Thu, 5 Sep 2013 12:38:05 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id BECF12046F for ; Thu, 5 Sep 2013 12:38:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6645B20460 for ; Thu, 5 Sep 2013 12:38:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759680Ab3IEMhg (ORCPT ); Thu, 5 Sep 2013 08:37:36 -0400 Received: from mailout3.w1.samsung.com ([210.118.77.13]:45552 "EHLO mailout3.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1761854Ab3IEMhb (ORCPT ); Thu, 5 Sep 2013 08:37:31 -0400 Received: from eucpsbgm2.samsung.com (unknown [203.254.199.245]) by mailout3.w1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MSN00HG0KEAGO50@mailout3.w1.samsung.com> for linux-samsung-soc@vger.kernel.org; Thu, 05 Sep 2013 13:37:27 +0100 (BST) X-AuditID: cbfec7f5-b7ef66d00000795a-71-52287b079029 Received: from eusync4.samsung.com ( [203.254.199.214]) by eucpsbgm2.samsung.com (EUCPMTA) with SMTP id 06.C4.31066.70B78225; Thu, 05 Sep 2013 13:37:27 +0100 (BST) Received: from AMDC1061.digital.local ([106.116.147.88]) by eusync4.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MSN001B7KDXF650@eusync4.samsung.com>; Thu, 05 Sep 2013 13:37:27 +0100 (BST) From: Andrzej Hajda To: linux-arm-kernel@lists.infradead.org Cc: Andrzej Hajda , Kukjin Kim , Mike Turquette , Kyungmin Park , devicetree-discuss@lists.ozlabs.org (moderated list:OPEN FIRMWARE AND...), linux-samsung-soc@vger.kernel.org (moderated list:ARM/S5P EXYNOS AR...) Subject: [PATCH 10/12] ARM: exynos5440: create a DT header defining CLK IDs Date: Thu, 05 Sep 2013 14:36:31 +0200 Message-id: <1378384594-4807-14-git-send-email-a.hajda@samsung.com> X-Mailer: git-send-email 1.8.1.2 In-reply-to: <1378384594-4807-1-git-send-email-a.hajda@samsung.com> References: <1378384594-4807-1-git-send-email-a.hajda@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrKJMWRmVeSWpSXmKPExsVy+t/xa7rs1RpBBpdWC1jcWneO1eLA7Ies Fr0LrrJZnG16w26x6fE1VosZ5/cxWTydcJHNgd3jzrU9bB6bl9R7nJ+xkNGjb8sqRo/Pm+QC WKO4bFJSczLLUov07RK4MlquNDAXXOaqmPtzP1MDYw9nFyMnh4SAicTddw2sELaYxIV769m6 GLk4hASWMkr8edTJCOH0MUls2LafBaSKTUBT4u/mm2wgtoiAhsSUrsfsIDazwC4miYNHmEBs YQFviakzvjGD2CwCqhLrJt0Bs3kFnCVmda6G2qYg8fPyCbA5nEDxOzOfgMWFBJwk5u5+xziB kXcBI8MqRtHU0uSC4qT0XCO94sTc4tK8dL3k/NxNjJCg+rqDcekxq0OMAhyMSjy8GobqQUKs iWXFlbmHGCU4mJVEeJnSNIKEeFMSK6tSi/Lji0pzUosPMTJxcEo1ME5sXaXz69DdwoaSyu2x mkYr33U+eRJYba5y8uDte4xittHHNiiqMy5bV8s567ZievU228naS7PnJ+sc6989v8R181MJ j5QqyR2zXmYfjSwRZX8RZOzkW5jWfPaIcvadlKQOAVvZqOMvAzR4Zxx8WigkkhYZJnuC+btL taev8UKjgGDDdYZcSizFGYmGWsxFxYkAeARIGAgCAAA= Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-9.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The patch adds header file defining clock IDs. This allows to use macros instead of magic numbers in DT bindings. Signed-off-by: Andrzej Hajda Signed-off-by: Kyungmin Park --- include/dt-bindings/clock/exynos5440.h | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 include/dt-bindings/clock/exynos5440.h diff --git a/include/dt-bindings/clock/exynos5440.h b/include/dt-bindings/clock/exynos5440.h new file mode 100644 index 0000000..68a472d --- /dev/null +++ b/include/dt-bindings/clock/exynos5440.h @@ -0,0 +1,29 @@ +#ifndef _DT_BINDINGS_CLOCK_EXYNOS_5440_H +#define _DT_BINDINGS_CLOCK_EXYNOS_5440_H + +#define CLK_XTAL 1 +#define CLK_ARM_CLK 2 +#define CLK_SPI_BAUD 16 +#define CLK_PB0_250 17 +#define CLK_PR0_250 18 +#define CLK_PR1_250 19 +#define CLK_B_250 20 +#define CLK_B_125 21 +#define CLK_B_200 22 +#define CLK_SATA 23 +#define CLK_USB 24 +#define CLK_GMAC0 25 +#define CLK_CS250 26 +#define CLK_PB0_250_O 27 +#define CLK_PR0_250_O 28 +#define CLK_PR1_250_O 29 +#define CLK_B_250_O 30 +#define CLK_B_125_O 31 +#define CLK_B_200_O 32 +#define CLK_SATA_O 33 +#define CLK_USB_O 34 +#define CLK_GMAC0_O 35 +#define CLK_CS250_O 36 +#define CLK_NR_CLKS 37 + +#endif /* _DT_BINDINGS_CLOCK_EXYNOS_5440_H */