From patchwork Tue Oct 1 06:33:01 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yuvaraj CD X-Patchwork-Id: 2968351 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 8C2259F288 for ; Tue, 1 Oct 2013 06:33:47 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7530E2024F for ; Tue, 1 Oct 2013 06:33:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4D942203AE for ; Tue, 1 Oct 2013 06:33:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751370Ab3JAGdo (ORCPT ); Tue, 1 Oct 2013 02:33:44 -0400 Received: from mail-pb0-f44.google.com ([209.85.160.44]:43535 "EHLO mail-pb0-f44.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750871Ab3JAGdn (ORCPT ); Tue, 1 Oct 2013 02:33:43 -0400 Received: by mail-pb0-f44.google.com with SMTP id xa7so6658773pbc.31 for ; Mon, 30 Sep 2013 23:33:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=t8oZPWpOSYeWBD7E0yek4WEa4DNHmN7XDX9amnt93bk=; b=rLd5lntzrkiiEWpLxTBofMo3AOfpldwopYocONbOvt7BCBuDcILwqEGSHUaB6LymH3 mNpF+ze/ff7c0pRKfjedgUBe8v6EaasdEA5rRR0NWcmBzFUbnkpCg2mxn8hsrLlmOqK5 xVEod3hY8G8b4tbb9Dn2+OS5l4kTRqMQV+E5yrVv34FsaPMc938FCRk6t/rvhnIL6oXZ 8/jNuaFWTQRORu4dN/B2tQPdVx7nFwQzyXOWjEWIRlp3TxE42+AfbAdXJzP39K7sBvNU dVCczgJw2oOZTWCHzbiB2TvvND8NaXsF4S4rc+QXKEwX/RFKwJOlCXB4USfLBUzcXmG2 /E0A== X-Received: by 10.68.135.132 with SMTP id ps4mr1364695pbb.171.1380609223069; Mon, 30 Sep 2013 23:33:43 -0700 (PDT) Received: from yuvaraj-ubuntu.sisodomain.com ([115.113.119.130]) by mx.google.com with ESMTPSA id jj1sm4800114pbb.17.1969.12.31.16.00.00 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 30 Sep 2013 23:33:42 -0700 (PDT) From: Yuvaraj Kumar C D To: tj@kernel.org, kgene.kim@samsung.com, grant.likely@linaro.org, rob.herring@calxeda.com, linux-ide@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, kishon@ti.com Cc: s.nawrocki@samsung.com, ks.giri@samsung.com, aditya.ps@samsung.com, Yuvaraj Kumar C D Subject: [PATCH 1/3] ahci: exynos: add ahci sata support on Exynos platform Date: Tue, 1 Oct 2013 12:03:01 +0530 Message-Id: <1380609183-21430-2-git-send-email-yuvaraj.cd@samsung.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1380609183-21430-1-git-send-email-yuvaraj.cd@samsung.com> References: <1380609183-21430-1-git-send-email-yuvaraj.cd@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-4.0 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, KHOP_BIG_TO_CC, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Exynos5250 contains one Synopsys AHCI SATA controller.The avalaible ahci_platform driver is not sufficient to handle the AHCI PHY and PHY clock related initialization. This patch adds exynos specific ahci sata driver,contained the exynos specific initialized codes, re-use the generic ahci_platform driver, and keep the generic ahci_platform driver clean as much as possible. This patch depends on the below patch [1].drivers: phy: add generic PHY framework by Kishon Vijay Abraham I Signed-off-by: Yuvaraj Kumar C D --- drivers/ata/Kconfig | 9 ++ drivers/ata/Makefile | 1 + drivers/ata/ahci_exynos.c | 226 +++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 236 insertions(+) create mode 100644 drivers/ata/ahci_exynos.c diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig index 4e73772..99b2392 100644 --- a/drivers/ata/Kconfig +++ b/drivers/ata/Kconfig @@ -106,6 +106,15 @@ config AHCI_IMX If unsure, say N. +config AHCI_EXYNOS + tristate "Samsung Exynos AHCI SATA support" + depends on SATA_AHCI_PLATFORM + help + This option enables support for the Samsung's Exynos SoC's + onboard AHCI SATA. + + If unsure, say N. + config SATA_FSL tristate "Freescale 3.0Gbps SATA support" depends on FSL_SOC diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile index 46518c6..0e1f420f 100644 --- a/drivers/ata/Makefile +++ b/drivers/ata/Makefile @@ -11,6 +11,7 @@ obj-$(CONFIG_SATA_SIL24) += sata_sil24.o obj-$(CONFIG_SATA_DWC) += sata_dwc_460ex.o obj-$(CONFIG_SATA_HIGHBANK) += sata_highbank.o libahci.o obj-$(CONFIG_AHCI_IMX) += ahci_imx.o +obj-$(CONFIG_AHCI_EXYNOS) += ahci_exynos.o # SFF w/ custom DMA obj-$(CONFIG_PDC_ADMA) += pdc_adma.o diff --git a/drivers/ata/ahci_exynos.c b/drivers/ata/ahci_exynos.c new file mode 100644 index 0000000..7f0af00 --- /dev/null +++ b/drivers/ata/ahci_exynos.c @@ -0,0 +1,226 @@ +/* + * Samsung AHCI SATA platform driver + * Copyright 2013 Samsung Electronics Co., Ltd. + * + * based on the AHCI SATA platform driver by Jeff Garzik and Anton Vorontsov + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see . + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include "ahci.h" + +#define MHZ (1000 * 1000) + +struct exynos_ahci_priv { + struct platform_device *ahci_pdev; + struct clk *sclk; + unsigned int freq; + struct phy *phy; +}; + +static int exynos_sata_init(struct device *dev, void __iomem *mmio) +{ + struct exynos_ahci_priv *priv = dev_get_drvdata(dev->parent); + int ret; + + priv->phy = devm_phy_get(dev , "sata-phy"); + if (IS_ERR(priv->phy)) + return PTR_ERR(priv->phy); + + ret = phy_init(priv->phy); + if (ret < 0) { + dev_err(dev, "failed to init SATA PHY\n"); + return ret; + } + + ret = clk_prepare_enable(priv->sclk); + if (ret < 0) { + dev_err(dev, "failed to enable source clk\n"); + return ret; + } + + ret = clk_set_rate(priv->sclk, priv->freq * MHZ); + if (ret < 0) { + dev_err(dev, "failed to set clk frequency\n"); + clk_disable_unprepare(priv->sclk); + return ret; + } + + return 0; +} + +static void exynos_sata_exit(struct device *dev) +{ + struct exynos_ahci_priv *priv = dev_get_drvdata(dev->parent); + if (!IS_ERR(priv->sclk)) + clk_disable_unprepare(priv->sclk); +} + +static int exynos_sata_suspend(struct device *dev) +{ + struct exynos_ahci_priv *priv = dev_get_drvdata(dev->parent); + + if (!IS_ERR(priv->sclk)) + clk_disable_unprepare(priv->sclk); + phy_power_off(priv->phy); + return 0; +} + +static int exynos_sata_resume(struct device *dev) +{ + struct exynos_ahci_priv *priv = dev_get_drvdata(dev->parent); + phy_power_on(priv->phy); + exynos_sata_init(dev, NULL); + return 0; +} + +static struct ahci_platform_data exynos_sata_pdata = { + .init = exynos_sata_init, + .exit = exynos_sata_exit, + .suspend = exynos_sata_suspend, + .resume = exynos_sata_resume, +}; + +static const struct of_device_id exynos_ahci_of_match[] = { + { .compatible = "samsung,exynos5250-sata-ahci", + .data = &exynos_sata_pdata}, + {}, +}; +MODULE_DEVICE_TABLE(of, exynos_ahci_of_match); + +static int exynos_sata_parse_dt(struct device_node *np, + struct exynos_ahci_priv *priv) +{ + if (!np) + return -EINVAL; + return of_property_read_u32(np, "samsung,sata-freq", + &priv->freq); +} + +static int exynos_ahci_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct resource *mem, *irq, res[2]; + const struct of_device_id *of_id; + const struct ahci_platform_data *pdata = NULL; + struct exynos_ahci_priv *priv; + struct device *ahci_dev; + struct platform_device *ahci_pdev; + int ret; + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) { + dev_err(dev, "can't alloc ahci_host_priv\n"); + return -ENOMEM; + } + + ahci_pdev = platform_device_alloc("ahci", -1); + if (!ahci_pdev) + return -ENODEV; + + ahci_dev = &ahci_pdev->dev; + ahci_dev->parent = dev; + + ret = exynos_sata_parse_dt(dev->of_node, priv); + if (ret < 0) { + dev_err(dev, "failed to parse device tree\n"); + goto err_out; + } + + priv->sclk = devm_clk_get(dev, "sclk_sata"); + if (IS_ERR(priv->sclk)) { + dev_err(dev, "failed to get sclk_sata\n"); + ret = PTR_ERR(priv->sclk); + goto err_out; + } + priv->ahci_pdev = ahci_pdev; + platform_set_drvdata(pdev, priv); + + of_id = of_match_device(exynos_ahci_of_match, dev); + if (of_id) { + pdata = of_id->data; + } else { + ret = -EINVAL; + goto err_out; + } + + mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); + irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); + if (!mem || !irq) { + dev_err(dev, "no mmio/irq resource\n"); + ret = -ENOMEM; + goto err_out; + } + + res[0] = *mem; + res[1] = *irq; + + ahci_dev->coherent_dma_mask = DMA_BIT_MASK(32); + ahci_dev->dma_mask = &ahci_dev->coherent_dma_mask; + ahci_dev->of_node = dev->of_node; + + ret = platform_device_add_resources(ahci_pdev, res, 2); + if (ret) + goto err_out; + + ret = platform_device_add_data(ahci_pdev, pdata, sizeof(*pdata)); + if (ret) + goto err_out; + + ret = platform_device_add(ahci_pdev); + if (ret) { + + +err_out: + platform_set_drvdata(pdev, NULL); + platform_device_put(ahci_pdev); + return ret; + } + + return 0; +} + +static int exynos_ahci_remove(struct platform_device *pdev) +{ + struct exynos_ahci_priv *priv = platform_get_drvdata(pdev); + struct platform_device *ahci_pdev = priv->ahci_pdev; + + platform_device_unregister(ahci_pdev); + platform_set_drvdata(pdev, NULL); + + return 0; +} + +static struct platform_driver exynos_ahci_driver = { + .probe = exynos_ahci_probe, + .remove = exynos_ahci_remove, + .driver = { + .name = "sata-exynos", + .owner = THIS_MODULE, + .of_match_table = exynos_ahci_of_match, + }, +}; +module_platform_driver(exynos_ahci_driver); + +MODULE_DESCRIPTION("Samsung Exynos AHCI SATA platform driver"); +MODULE_AUTHOR("Yuvaraj C D "); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("ahci:exynos");