From patchwork Thu Oct 17 03:12:05 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Naveen Krishna Chatradhi X-Patchwork-Id: 3058541 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id A4B1B9F2B6 for ; Thu, 17 Oct 2013 03:10:08 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 869D42039F for ; Thu, 17 Oct 2013 03:10:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3EC632039E for ; Thu, 17 Oct 2013 03:10:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1762182Ab3JQDKE (ORCPT ); Wed, 16 Oct 2013 23:10:04 -0400 Received: from mailout3.samsung.com ([203.254.224.33]:40132 "EHLO mailout3.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1761745Ab3JQDKB (ORCPT ); Wed, 16 Oct 2013 23:10:01 -0400 Received: from epcpsbgr4.samsung.com (u144.gpu120.samsung.co.kr [203.254.230.144]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MUS00JQYM41MOK0@mailout3.samsung.com>; Thu, 17 Oct 2013 12:10:00 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.122]) by epcpsbgr4.samsung.com (EPCPMTA) with SMTP id 64.41.29771.8055F525; Thu, 17 Oct 2013 12:10:00 +0900 (KST) X-AuditID: cbfee690-b7fa36d00000744b-82-525f5508fed2 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id AB.66.05832.7055F525; Thu, 17 Oct 2013 12:10:00 +0900 (KST) Received: from naveen-linux.sisodomain.com ([107.108.83.161]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MUS00MEHM4JJW80@mmp1.samsung.com>; Thu, 17 Oct 2013 12:09:59 +0900 (KST) From: Naveen Krishna Chatradhi To: linux-pm@vger.kernel.org Cc: naveenkrishna.ch@gmail.com, rui.zhang@intel.com, eduardo.valentin@ti.com, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, amit.daniel@samsung.com, kgene.kim@samsung.com, devicetree@vger.kernel.org, b.zolnierkie@samsung.com, cpgs@samsung.com Subject: [PATCH 2/3 v6] thermal: samsung: change base_common to more meaningful base_second Date: Thu, 17 Oct 2013 08:42:05 +0530 Message-id: <1381979525-7186-1-git-send-email-ch.naveen@samsung.com> X-Mailer: git-send-email 1.7.10.4 In-reply-to: <1378268629-2886-2-git-send-email-ch.naveen@samsung.com> References: <1378268629-2886-2-git-send-email-ch.naveen@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupgkeLIzCtJLcpLzFFi42JZI2JSpcsRGh9k0LdAyKLhaojFxhnrWS1e HtK0mH/kHKvFmv0/mSx6F1xls7i8aw6bxefeI4wWM87vY7JYtO0/s8WTh31sDtweO2fdZfdY vOclk0ffllWMHsdvbGfy+LxJLoA1issmJTUnsyy1SN8ugStj3a05TAWH9SpW7Wtka2BcrNbF yMkhIWAisX7KMVYIW0ziwr31bF2MXBxCAksZJZbN28DYxcgBVvR9vSdEfBGjxLrue4wQTg+T RM+W6WDdbAJmEgcXrWYHsUUEZCSmXtnPClLELNDNJDF/xTkWkISwQKzE3oVv2UBsFgFViVu7 nzKD2LwCLhL3911ihDhDUaL72QSwGk4BV4mPz3+AxYWAava/XMMMUbOPXeLiX2uIOQIS3yYf YoG4VFZi0wGoEkmJgytusExgFF7AyLCKUTS1ILmgOCm9yESvODG3uDQvXS85P3cTIzAWTv97 NmEH470D1ocYk4HGTWSWEk3OB8ZSXkm8obGZkYWpiamxkbmlGWnCSuK86i3WgUIC6Yklqdmp qQWpRfFFpTmpxYcYmTg4pRoYLd4K/rcvPftVdo7gLqf5U/+0JiuoMWy60XKUPeaui0Z3nvjG 6ybcLUqCC2zWqxy89mnBx/+rFt5/pbdh6pdft1580rwY57jAaL/PoquHTRhMVoXM038mulSq WP94myr/Mn9jHu8zktXyjcdCPdZs731wrsYq7bVf+/rvfEatL/7KKKQ/bg51UGIpzkg01GIu Kk4EAJyFFgSbAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrGIsWRmVeSWpSXmKPExsVy+t9jAV2O0Pggg3ff2SwaroZYbJyxntXi 5SFNi/lHzrFarNn/k8mid8FVNovLu+awWXzuPcJoMeP8PiaLRdv+M1s8edjH5sDtsXPWXXaP xXteMnn0bVnF6HH8xnYmj8+b5AJYoxoYbTJSE1NSixRS85LzUzLz0m2VvIPjneNNzQwMdQ0t LcyVFPISc1NtlVx8AnTdMnOALlNSKEvMKQUKBSQWFyvp22GaEBripmsB0xih6xsSBNdjZIAG EtYwZqy7NYep4LBexap9jWwNjIvVuhg5OCQETCS+r/fsYuQEMsUkLtxbz9bFyMUhJLCIUWJd 9z1GCKeHSaJny3RWkCo2ATOJg4tWs4PYIgIyElOv7GcFKWIW6GaSmL/iHAtIQlggVmLvwrds IDaLgKrErd1PmUFsXgEXifv7LjFCrFOU6H42AayGU8BV4uPzH2BxIaCa/S/XME9g5F3AyLCK UTS1ILmgOCk910ivODG3uDQvXS85P3cTIzjWnknvYFzVYHGIUYCDUYmHd8byuCAh1sSy4src Q4wSHMxKIrwXA+ODhHhTEiurUovy44tKc1KLDzEmA101kVlKNDkfmAbySuINjU3MTY1NLU0s TMwsSRNWEuc92GodKCSQnliSmp2aWpBaBLOFiYNTqoGxYmvBC8NlbFqpuebscW0Ocz1uCE59 YRh0oOPis5w7rQdFi4J5mCqWVYRr5ubHuHDs7FG7XcIwi2Xl7RVvY9JEz7JNf+y2tOOh1JGK /DlfpUSvmdbUbFwZfua3ZfDiVXMMppTpirh+4PfYfWp/1lr+jZfYe+e83lnhPovPrp+7bMb0 Getvzb2lxFKckWioxVxUnAgA/sDY0vkCAAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,KHOP_BIG_TO_CC, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Exynos5440 and Exynos5420 there are registers common across the TMU channels. To support that, we introduced a ADDRESS_MULTIPLE flag in the driver and the 2nd set of register base and size are provided in the "reg" property of the node. As per Amit's suggestion, this patch changes the base_common to base_second and SHARED_MEMORY to ADDRESS_MULTIPLE. Signed-off-by: Naveen Krishna Chatradhi --- Changes since v1: None Changes since v2: Changed the flag name from SHARED_MEMORY to ADDRESS_MULTIPLE. https://lkml.org/lkml/2013/8/1/38 Changes since v3: None Changes since v4: Corrected a compilation error, undeclared variable Changes since v5: None .../devicetree/bindings/thermal/exynos-thermal.txt | 4 ++-- drivers/thermal/samsung/exynos_tmu.c | 14 +++++++------- drivers/thermal/samsung/exynos_tmu.h | 4 ++-- drivers/thermal/samsung/exynos_tmu_data.c | 2 +- 4 files changed, 12 insertions(+), 12 deletions(-) diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt index 284f530..116cca0 100644 --- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt +++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt @@ -11,8 +11,8 @@ - reg : Address range of the thermal registers. For soc's which has multiple instances of TMU and some registers are shared across all TMU's like interrupt related then 2 set of register has to supplied. First set - belongs to each instance of TMU and second set belongs to common TMU - registers. + belongs to each instance of TMU and second set belongs to second set + of common TMU registers. - interrupts : Should contain interrupt for thermal system - clocks : The main clock for TMU device - clock-names : Thermal system clock name diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c index b2202fa..ae80a87 100644 --- a/drivers/thermal/samsung/exynos_tmu.c +++ b/drivers/thermal/samsung/exynos_tmu.c @@ -41,7 +41,7 @@ * @id: identifier of the one instance of the TMU controller. * @pdata: pointer to the tmu platform/configuration data * @base: base address of the single instance of the TMU controller. - * @base_common: base address of the common registers of the TMU controller. + * @base_second: base address of the common registers of the TMU controller. * @irq: irq number of the TMU controller. * @soc: id of the SOC type. * @irq_work: pointer to the irq work structure. @@ -56,7 +56,7 @@ struct exynos_tmu_data { int id; struct exynos_tmu_platform_data *pdata; void __iomem *base; - void __iomem *base_common; + void __iomem *base_second; int irq; enum soc_type soc; struct work_struct irq_work; @@ -297,7 +297,7 @@ skip_calib_data: } /*Clear the PMIN in the common TMU register*/ if (reg->tmu_pmin && !data->id) - writel(0, data->base_common + reg->tmu_pmin); + writel(0, data->base_second + reg->tmu_pmin); out: clk_disable(data->clk); mutex_unlock(&data->lock); @@ -454,7 +454,7 @@ static void exynos_tmu_work(struct work_struct *work) /* Find which sensor generated this interrupt */ if (reg->tmu_irqstatus) { - val_type = readl(data->base_common + reg->tmu_irqstatus); + val_type = readl(data->base_second + reg->tmu_irqstatus); if (!((val_type >> data->id) & 0x1)) goto out; } @@ -579,7 +579,7 @@ static int exynos_map_dt_data(struct platform_device *pdev) * Check if the TMU shares some registers and then try to map the * memory of common registers. */ - if (!TMU_SUPPORTS(pdata, SHARED_MEMORY)) + if (!TMU_SUPPORTS(pdata, ADDRESS_MULTIPLE)) return 0; if (of_address_to_resource(pdev->dev.of_node, 1, &res)) { @@ -587,9 +587,9 @@ static int exynos_map_dt_data(struct platform_device *pdev) return -ENODEV; } - data->base_common = devm_ioremap(&pdev->dev, res.start, + data->base_second = devm_ioremap(&pdev->dev, res.start, resource_size(&res)); - if (!data->base_common) { + if (!data->base_second) { dev_err(&pdev->dev, "Failed to ioremap memory\n"); return -ENOMEM; } diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h index 5f4fe6c..d79264f 100644 --- a/drivers/thermal/samsung/exynos_tmu.h +++ b/drivers/thermal/samsung/exynos_tmu.h @@ -60,7 +60,7 @@ enum soc_type { * state(active/idle) can be checked. * TMU_SUPPORT_EMUL_TIME - This features allows to set next temp emulation * sample time. - * TMU_SUPPORT_SHARED_MEMORY - This feature tells that the different TMU + * TMU_SUPPORT_ADDRESS_MULTIPLE - This feature tells that the different TMU * sensors shares some common registers. * TMU_SUPPORT - macro to compare the above features with the supplied. */ @@ -70,7 +70,7 @@ enum soc_type { #define TMU_SUPPORT_FALLING_TRIP BIT(3) #define TMU_SUPPORT_READY_STATUS BIT(4) #define TMU_SUPPORT_EMUL_TIME BIT(5) -#define TMU_SUPPORT_SHARED_MEMORY BIT(6) +#define TMU_SUPPORT_ADDRESS_MULTIPLE BIT(6) #define TMU_SUPPORTS(a, b) (a->features & TMU_SUPPORT_ ## b) diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c index 09a8a27..3d9ade5 100644 --- a/drivers/thermal/samsung/exynos_tmu_data.c +++ b/drivers/thermal/samsung/exynos_tmu_data.c @@ -257,7 +257,7 @@ static const struct exynos_tmu_registers exynos5440_tmu_registers = { .type = SOC_ARCH_EXYNOS5440, \ .registers = &exynos5440_tmu_registers, \ .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_FALLING_TRIP | \ - TMU_SUPPORT_MULTI_INST | TMU_SUPPORT_SHARED_MEMORY), + TMU_SUPPORT_MULTI_INST | TMU_SUPPORT_ADDRESS_MULTIPLE), struct exynos_tmu_init_data const exynos5440_default_tmu_data = { .tmu_data = {