@@ -235,4 +235,20 @@
io-channel-ranges;
status = "disabled";
};
+
+ usbphy@12100000 {
+ compatible = "samsung,exynos5420-usb3phy";
+ reg = <0x12100000 0x100 0x10040704 0x4>;
+ clocks = <&clock 366>, <&clock 1>, <&clock 152>;
+ clock-names = "phy", "usb3drd", "sclk_usbphy30";
+ #phy-cells = <0>;
+ };
+
+ usbphy@12500000 {
+ compatible = "samsung,exynos5420-usb3phy";
+ reg = <0x12500000 0x100 0x10040708 0x4>;
+ clocks = <&clock 367>, <&clock 1>, <&clock 153>;
+ clock-names = "phy", "usb3drd", "sclk_usbphy30";
+ #phy-cells = <0>;
+ };
};
Add device tree nodes for USB 3.0 PHY present alongwith USB 3.0 controller Exynos 5420 SoC. This phy driver is based on generic phy framework. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> --- arch/arm/boot/dts/exynos5420.dtsi | 16 ++++++++++++++++ 1 files changed, 16 insertions(+), 0 deletions(-)