| Message ID | 1389354229-31936-1-git-send-email-ch.naveen@samsung.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Hi Naveen, On 10.01.2014 12:43, Naveen Krishna Chatradhi wrote: > This patch adds gating clock for SSS(Security SubSystem) > module on Exynos5250. > > Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> > --- > Changes since v2: > This is a new change to support SSS on Exynos5250 > > drivers/clk/samsung/clk-exynos5250.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c > index adf3234..b47bf0a 100644 > --- a/drivers/clk/samsung/clk-exynos5250.c > +++ b/drivers/clk/samsung/clk-exynos5250.c > @@ -120,7 +120,7 @@ enum exynos5250_clks { > spi2, i2s1, i2s2, pcm1, pcm2, pwm, spdif, ac97, hsi2c0, hsi2c1, hsi2c2, > hsi2c3, chipid, sysreg, pmu, cmu_top, cmu_core, cmu_mem, tzpc0, tzpc1, > tzpc2, tzpc3, tzpc4, tzpc5, tzpc6, tzpc7, tzpc8, tzpc9, hdmi_cec, mct, > - wdt, rtc, tmu, fimd1, mie1, dsim0, dp, mixer, hdmi, g2d, > + wdt, rtc, tmu, fimd1, mie1, dsim0, dp, mixer, hdmi, g2d, sss, Please base changes to Samsung clock drivers on Mike Turquette's clk-next [1] or ideally on my samsung-next branch on samsung-clk-tree [2]. By the way, if you assign an ID to a clock, you need to document this in respective clock bindings documentation. [1] - https://git.linaro.org/people/mike.turquette/linux.git [2] - https://git.kernel.org/cgit/linux/kernel/git/tfiga/samsung-clk.git/ Best regards, Tomasz -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hello Tomasz, On 10 January 2014 21:28, Tomasz Figa <t.figa@samsung.com> wrote: > Hi Naveen, > > > On 10.01.2014 12:43, Naveen Krishna Chatradhi wrote: >> >> This patch adds gating clock for SSS(Security SubSystem) >> module on Exynos5250. >> >> Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> >> --- >> Changes since v2: >> This is a new change to support SSS on Exynos5250 >> >> drivers/clk/samsung/clk-exynos5250.c | 3 ++- >> 1 file changed, 2 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/clk/samsung/clk-exynos5250.c >> b/drivers/clk/samsung/clk-exynos5250.c >> index adf3234..b47bf0a 100644 >> --- a/drivers/clk/samsung/clk-exynos5250.c >> +++ b/drivers/clk/samsung/clk-exynos5250.c >> @@ -120,7 +120,7 @@ enum exynos5250_clks { >> spi2, i2s1, i2s2, pcm1, pcm2, pwm, spdif, ac97, hsi2c0, hsi2c1, >> hsi2c2, >> hsi2c3, chipid, sysreg, pmu, cmu_top, cmu_core, cmu_mem, tzpc0, >> tzpc1, >> tzpc2, tzpc3, tzpc4, tzpc5, tzpc6, tzpc7, tzpc8, tzpc9, hdmi_cec, >> mct, >> - wdt, rtc, tmu, fimd1, mie1, dsim0, dp, mixer, hdmi, g2d, >> + wdt, rtc, tmu, fimd1, mie1, dsim0, dp, mixer, hdmi, g2d, sss, > > > Please base changes to Samsung clock drivers on Mike Turquette's clk-next > [1] or ideally on my samsung-next branch on samsung-clk-tree [2]. > > By the way, if you assign an ID to a clock, you need to document this in > respective clock bindings documentation. > > [1] - https://git.linaro.org/people/mike.turquette/linux.git > [2] - https://git.kernel.org/cgit/linux/kernel/git/tfiga/samsung-clk.git/ Sure Tomasz, Will rebase this changes on to your samsung-clk.git tree > > Best regards, > Tomasz
diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c index adf3234..b47bf0a 100644 --- a/drivers/clk/samsung/clk-exynos5250.c +++ b/drivers/clk/samsung/clk-exynos5250.c @@ -120,7 +120,7 @@ enum exynos5250_clks { spi2, i2s1, i2s2, pcm1, pcm2, pwm, spdif, ac97, hsi2c0, hsi2c1, hsi2c2, hsi2c3, chipid, sysreg, pmu, cmu_top, cmu_core, cmu_mem, tzpc0, tzpc1, tzpc2, tzpc3, tzpc4, tzpc5, tzpc6, tzpc7, tzpc8, tzpc9, hdmi_cec, mct, - wdt, rtc, tmu, fimd1, mie1, dsim0, dp, mixer, hdmi, g2d, + wdt, rtc, tmu, fimd1, mie1, dsim0, dp, mixer, hdmi, g2d, sss, /* mux clocks */ mout_hdmi = 1024, @@ -492,6 +492,7 @@ static struct samsung_gate_clock exynos5250_gate_clks[] __initdata = { GATE(mixer, "mixer", "mout_aclk200_disp1", GATE_IP_DISP1, 5, 0, 0), GATE(hdmi, "hdmi", "mout_aclk200_disp1", GATE_IP_DISP1, 6, 0, 0), GATE(g2d, "g2d", "aclk200", GATE_IP_ACP, 3, 0, 0), + GATE(sss, "sss", "aclk200", GATE_IP_ACP, 2, 0, 0), }; static struct samsung_pll_rate_table vpll_24mhz_tbl[] __initdata = {
This patch adds gating clock for SSS(Security SubSystem) module on Exynos5250. Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> --- Changes since v2: This is a new change to support SSS on Exynos5250 drivers/clk/samsung/clk-exynos5250.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)