From patchwork Wed Feb 5 05:16:13 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rahul Sharma X-Patchwork-Id: 3584401 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 0045AC02DC for ; Wed, 5 Feb 2014 05:16:57 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 086582018B for ; Wed, 5 Feb 2014 05:16:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EFC7320170 for ; Wed, 5 Feb 2014 05:16:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751047AbaBEFQy (ORCPT ); Wed, 5 Feb 2014 00:16:54 -0500 Received: from mailout2.samsung.com ([203.254.224.25]:14415 "EHLO mailout2.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750933AbaBEFQx (ORCPT ); Wed, 5 Feb 2014 00:16:53 -0500 Received: from epcpsbgr3.samsung.com (u143.gpu120.samsung.co.kr [203.254.230.143]) by mailout2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0N0I00E88C045750@mailout2.samsung.com> for linux-samsung-soc@vger.kernel.org; Wed, 05 Feb 2014 14:16:52 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.126]) by epcpsbgr3.samsung.com (EPCPMTA) with SMTP id D5.DB.10092.449C1F25; Wed, 05 Feb 2014 14:16:52 +0900 (KST) X-AuditID: cbfee68f-b7f156d00000276c-72-52f1c944dbea Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id EE.05.28157.449C1F25; Wed, 05 Feb 2014 14:16:52 +0900 (KST) Received: from localhost.localdomain ([107.108.83.245]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0N0I003BXBZXFH10@mmp1.samsung.com>; Wed, 05 Feb 2014 14:16:51 +0900 (KST) From: Rahul Sharma To: linux-samsung-soc@vger.kernel.org Cc: kgene.kim@samsung.com, tomasz.figa@gmail.com, joshi@samsung.com, r.sh.open@gmail.com, Pankaj Dubey , Rahul Sharma Subject: [PATCH V2 1/3] ARM: EXYNOS: initial board support for exynos5260 SoC Date: Wed, 05 Feb 2014 10:46:13 +0530 Message-id: <1391577375-17625-2-git-send-email-rahul.sharma@samsung.com> X-Mailer: git-send-email 1.7.9.5 In-reply-to: <1391577375-17625-1-git-send-email-rahul.sharma@samsung.com> References: <1391577375-17625-1-git-send-email-rahul.sharma@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrNLMWRmVeSWpSXmKPExsWyRsSkTtfl5Mcgg399Uhbfd31ht+hdcJXN Ysb5fUwWi7YCuQtfxFtMWXSY1WLVrj+MDuweO2fdZffo27KK0ePzJrkA5igum5TUnMyy1CJ9 uwSujN8/57AVPNeruDO1lb2B8YF6FyMnh4SAicS97YeYIWwxiQv31rN1MXJxCAksZZRY9u0k C0zRiluXWSESixgl9h6aAFXVziTxYeZ0NpAqNgFdidkHnzGC2CICqhKf2xawgxQxC6xjlFjz fzI7SEJYwFeiY8dqsCIWoKI/nRuAxnJw8Ap4SHw6GABiSggoSMyZZANSwSngKdHz8hfYdUJA FTNWrQAbKSHQzS7RMfcuK8QYAYlvkw+xQPTKSmw6APWNpMTBFTdYJjAKL2BkWMUomlqQXFCc lF5krFecmFtcmpeul5yfu4kRGNCn/z3r38F494D1IcZkoHETmaVEk/OBEZFXEm9obGZkYWpi amxkbmlGmrCSOO/9h0lBQgLpiSWp2ampBalF8UWlOanFhxiZODilGhi32clqVlpqcJt+edvr Yu7xn6F9UuD/m19ziuYtl9A2zjFcxM13JmihXdedU3ICDt7RRVIaswvr/7z+qNdWv9F+cvAk 5+dlfNufqIR7m6hOV41iyojmfh2+RNProcO6yVo/eRy9RWuOXcjj+X8gWs78UkWJ960/M9n3 B21dmfXR1P3s30ORdUosxRmJhlrMRcWJAJuSrB5+AgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrBIsWRmVeSWpSXmKPExsVy+t9jAV2Xkx+DDE5M47D4vusLu0Xvgqts FjPO72OyWLQVyF34It5iyqLDrBardv1hdGD32DnrLrtH35ZVjB6fN8kFMEc1MNpkpCampBYp pOYl56dk5qXbKnkHxzvHm5oZGOoaWlqYKynkJeam2iq5+AToumXmAC1XUihLzCkFCgUkFhcr 6dthmhAa4qZrAdMYoesbEgTXY2SABhLWMGb8/jmHreC5XsWdqa3sDYwP1LsYOTkkBEwkVty6 zAphi0lcuLeerYuRi0NIYBGjxN5DE6CcdiaJDzOns4FUsQnoSsw++IwRxBYRUJX43LaAHaSI WWAdo8Sa/5PZQRLCAr4SHTtWgxWxABX96dwAtIKDg1fAQ+LTwQAQU0JAQWLOJBuQCk4BT4me l7+YQWwhoIoZq1awT2DkXcDIsIpRNLUguaA4KT3XSK84Mbe4NC9dLzk/dxMjOF6eSe9gXNVg cYhRgINRiYfXQPhjkBBrYllxZe4hRgkOZiUR3sRuoBBvSmJlVWpRfnxRaU5q8SHGZKCbJjJL iSbnA2M5ryTe0NjE3NTY1NLEwsTMkjRhJXHeg63WgUIC6YklqdmpqQWpRTBbmDg4pRoYp/2X c+xvXp5v7MnLrVfB8VA/UNT52V8ph19x2w81GU1LvPihjXXjBba/WQKm0/ll/7A3959j5PRj 6czTnNwmNdMnaG3B09WBr1+GfFA9EirS+NxAb3ZJvp/ij/paLdePR9dtLmX/7FDz77rd142/ Ipwzzm/219bkfj7PyCFZIXXJKgahhw5KLMUZiYZazEXFiQDtEqQo2wIAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Pankaj Dubey This patch add basic arch side support for exynos5260 SoC. Signed-off-by: Pankaj Dubey Signed-off-by: Arun Kumar K Signed-off-by: Rahul Sharma --- arch/arm/mach-exynos/Kconfig | 9 +++++++++ arch/arm/mach-exynos/common.c | 18 ++++++++++++++++++ arch/arm/mach-exynos/include/mach/map.h | 1 + arch/arm/mach-exynos/mach-exynos5-dt.c | 1 + arch/arm/plat-samsung/include/plat/cpu.h | 8 ++++++++ arch/arm/plat-samsung/include/plat/map-s5p.h | 1 + 6 files changed, 38 insertions(+) mode change 100644 => 100755 arch/arm/mach-exynos/include/mach/map.h mode change 100644 => 100755 arch/arm/mach-exynos/mach-exynos5-dt.c mode change 100644 => 100755 arch/arm/plat-samsung/include/plat/cpu.h diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 4c414af..5c96248 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -91,6 +91,15 @@ config SOC_EXYNOS5250 help Enable EXYNOS5250 SoC support +config SOC_EXYNOS5260 + bool "SAMSUNG EXYNOS5260" + default y + depends on ARCH_EXYNOS5 + select AUTO_ZRELADDR + select SAMSUNG_DMADEV + help + Enable EXYNOS5260 SoC support + config SOC_EXYNOS5420 bool "SAMSUNG EXYNOS5420" default y diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index 72ae5d3..4ee14ed 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c @@ -52,6 +52,7 @@ static const char name_exynos4210[] = "EXYNOS4210"; static const char name_exynos4212[] = "EXYNOS4212"; static const char name_exynos4412[] = "EXYNOS4412"; static const char name_exynos5250[] = "EXYNOS5250"; +static const char name_exynos5260[] = "EXYNOS5260"; static const char name_exynos5420[] = "EXYNOS5420"; static const char name_exynos5440[] = "EXYNOS5440"; @@ -85,6 +86,12 @@ static struct cpu_table cpu_ids[] __initdata = { .init = exynos_init, .name = name_exynos5250, }, { + .idcode = EXYNOS5260_SOC_ID, + .idmask = EXYNOS5_SOC_MASK, + .map_io = exynos5_map_io, + .init = exynos_init, + .name = name_exynos5260, + }, { .idcode = EXYNOS5420_SOC_ID, .idmask = EXYNOS5_SOC_MASK, .map_io = exynos5_map_io, @@ -263,6 +270,15 @@ static struct map_desc exynos5_iodesc[] __initdata = { }, }; +static struct map_desc exynos5260_iodesc[] __initdata = { + { + .virtual = (unsigned long)S5P_VA_SYSRAM_NS, + .pfn = __phys_to_pfn(EXYNOS5260_PA_SYSRAM_NS), + .length = SZ_4K, + .type = MT_DEVICE, + }, +}; + void exynos4_restart(enum reboot_mode mode, const char *cmd) { __raw_writel(0x1, S5P_SWRESET); @@ -374,6 +390,8 @@ static void __init exynos5_map_io(void) if (soc_is_exynos5250()) iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc)); + if (soc_is_exynos5260()) + iotable_init(exynos5260_iodesc, ARRAY_SIZE(exynos5260_iodesc)); } struct bus_type exynos_subsys = { diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h old mode 100644 new mode 100755 index 7b046b5..bd6fa02 --- a/arch/arm/mach-exynos/include/mach/map.h +++ b/arch/arm/mach-exynos/include/mach/map.h @@ -29,6 +29,7 @@ #define EXYNOS4210_PA_SYSRAM_NS 0x0203F000 #define EXYNOS4x12_PA_SYSRAM_NS 0x0204F000 #define EXYNOS5250_PA_SYSRAM_NS 0x0204F000 +#define EXYNOS5260_PA_SYSRAM_NS 0x02073000 #define EXYNOS_PA_CHIPID 0x10000000 diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c old mode 100644 new mode 100755 index 65a4646..18aee57 --- a/arch/arm/mach-exynos/mach-exynos5-dt.c +++ b/arch/arm/mach-exynos/mach-exynos5-dt.c @@ -50,6 +50,7 @@ static void __init exynos5_dt_machine_init(void) static char const *exynos5_dt_compat[] __initdata = { "samsung,exynos5250", + "samsung,exynos5260", "samsung,exynos5420", "samsung,exynos5440", NULL diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h old mode 100644 new mode 100755 index 335beb3..60687aa --- a/arch/arm/plat-samsung/include/plat/cpu.h +++ b/arch/arm/plat-samsung/include/plat/cpu.h @@ -46,6 +46,7 @@ extern unsigned long samsung_cpu_id; #define EXYNOS4_CPU_MASK 0xFFFE0000 #define EXYNOS5250_SOC_ID 0x43520000 +#define EXYNOS5260_SOC_ID 0xE5260000 #define EXYNOS5420_SOC_ID 0xE5420000 #define EXYNOS5440_SOC_ID 0xE5440000 #define EXYNOS5_SOC_MASK 0xFFFFF000 @@ -68,6 +69,7 @@ IS_SAMSUNG_CPU(exynos4210, EXYNOS4210_CPU_ID, EXYNOS4_CPU_MASK) IS_SAMSUNG_CPU(exynos4212, EXYNOS4212_CPU_ID, EXYNOS4_CPU_MASK) IS_SAMSUNG_CPU(exynos4412, EXYNOS4412_CPU_ID, EXYNOS4_CPU_MASK) IS_SAMSUNG_CPU(exynos5250, EXYNOS5250_SOC_ID, EXYNOS5_SOC_MASK) +IS_SAMSUNG_CPU(exynos5260, EXYNOS5260_SOC_ID, EXYNOS5_SOC_MASK) IS_SAMSUNG_CPU(exynos5420, EXYNOS5420_SOC_ID, EXYNOS5_SOC_MASK) IS_SAMSUNG_CPU(exynos5440, EXYNOS5440_SOC_ID, EXYNOS5_SOC_MASK) @@ -148,6 +150,12 @@ IS_SAMSUNG_CPU(exynos5440, EXYNOS5440_SOC_ID, EXYNOS5_SOC_MASK) # define soc_is_exynos5250() 0 #endif +#if defined(CONFIG_SOC_EXYNOS5260) +# define soc_is_exynos5260() is_samsung_exynos5260() +#else +# define soc_is_exynos5260() 0 +#endif + #if defined(CONFIG_SOC_EXYNOS5420) # define soc_is_exynos5420() is_samsung_exynos5420() #else diff --git a/arch/arm/plat-samsung/include/plat/map-s5p.h b/arch/arm/plat-samsung/include/plat/map-s5p.h index c186786..804597c 100644 --- a/arch/arm/plat-samsung/include/plat/map-s5p.h +++ b/arch/arm/plat-samsung/include/plat/map-s5p.h @@ -23,6 +23,7 @@ #define S5P_VA_SYSRAM S3C_ADDR(0x02400000) #define S5P_VA_SYSRAM_NS S3C_ADDR(0x02410000) + #define S5P_VA_DMC0 S3C_ADDR(0x02440000) #define S5P_VA_DMC1 S3C_ADDR(0x02480000) #define S5P_VA_SROMC S3C_ADDR(0x024C0000)