From patchwork Thu Apr 3 15:11:02 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rahul Sharma X-Patchwork-Id: 3932931 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 955DBBFF02 for ; Thu, 3 Apr 2014 15:12:55 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B23E32021B for ; Thu, 3 Apr 2014 15:12:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1B6F920270 for ; Thu, 3 Apr 2014 15:12:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752455AbaDCPMn (ORCPT ); Thu, 3 Apr 2014 11:12:43 -0400 Received: from mailout3.samsung.com ([203.254.224.33]:35635 "EHLO mailout3.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752536AbaDCPMR (ORCPT ); Thu, 3 Apr 2014 11:12:17 -0400 Received: from epcpsbgr3.samsung.com (u143.gpu120.samsung.co.kr [203.254.230.143]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0N3G00BTWNKFZW10@mailout3.samsung.com> for linux-samsung-soc@vger.kernel.org; Fri, 04 Apr 2014 00:12:15 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.125]) by epcpsbgr3.samsung.com (EPCPMTA) with SMTP id 5E.97.10092.F4A7D335; Fri, 04 Apr 2014 00:12:15 +0900 (KST) X-AuditID: cbfee68f-b7f156d00000276c-e4-533d7a4fa1e2 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 8A.49.28157.F4A7D335; Fri, 04 Apr 2014 00:12:15 +0900 (KST) Received: from localhost.localdomain ([107.108.83.245]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0N3G00IVZNJBV460@mmp2.samsung.com>; Fri, 04 Apr 2014 00:12:15 +0900 (KST) From: Rahul Sharma To: dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org Cc: inki.dae@samsung.com, r.sh.open@gmail.com, joshi@samsung.com, Shirish S , Rahul Sharma Subject: [PATCH 5/7] drm/exynos: add hdmiphy power on/off sequence Date: Thu, 03 Apr 2014 20:41:02 +0530 Message-id: <1396537864-29291-6-git-send-email-rahul.sharma@samsung.com> X-Mailer: git-send-email 1.7.9.5 In-reply-to: <1396537864-29291-1-git-send-email-rahul.sharma@samsung.com> References: <1396537864-29291-1-git-send-email-rahul.sharma@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrALMWRmVeSWpSXmKPExsWyRsSkVte/yjbY4EKHisWVr+/ZLCbdn8Bi 8X3XF3aLGef3MVksfBFvMWXRYVaLabM3Mjqwe+ycdZfd4373cSaPvi2rGD0+b5ILYInisklJ zcksSy3St0vgyvi67Q9jwTvRipudO9gaGKcKdTFyckgImEicvb6SEcIWk7hwbz1bFyMXh5DA UkaJ/d8b2GCKHk/rYIFITGeU2DnjEzuE084ksfXNHrAqNgFdidkHn4GNEhFwk2g6PJMVpIhZ oI9R4sq2HSwgCWEBJ4n5r44DdXNwsAioSqx7awwS5hXwkGh7dZIVJCwhoCAxZ5INSJhTwFPi y+dPYCOFgEp+7jsEtldCYDq7xPVZO5hAEiwCAhLfJh9igeiVldh0gBniaEmJgytusExgFF7A yLCKUTS1ILmgOCm9yFivODG3uDQvXS85P3cTIzC0T/971r+D8e4B60OMyUDjJjJLiSbnA2Mj ryTe0NjMyMLUxNTYyNzSjDRhJXHe+w+TgoQE0hNLUrNTUwtSi+KLSnNSiw8xMnFwSjUwBjzY 3yT//AXTs6B66wwt80zVbdv2GcdoqjzU07r8j22n8YWP092458xKsPac5WZg+FWIq9k/znbt nPqzhsLvlrafuDTxpIqvFkdpvN6lr5L9tY+OHHvJ8MtRi1POqDJ63gbb1m1iLcZuytw7Vwa3 TbBJLrrXey1EbsVWY5ELLLmdf6e/nsuuxFKckWioxVxUnAgABpVLeoMCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrLIsWRmVeSWpSXmKPExsVy+t9jQV3/Kttgg1c7ZCyufH3PZjHp/gQW i++7vrBbzDi/j8li4Yt4iymLDrNaTJu9kdGB3WPnrLvsHve7jzN59G1ZxejxeZNcAEtUA6NN RmpiSmqRQmpecn5KZl66rZJ3cLxzvKmZgaGuoaWFuZJCXmJuqq2Si0+ArltmDtAFSgpliTml QKGAxOJiJX07TBNCQ9x0LWAaI3R9Q4LgeowM0EDCGsaMr9v+MBa8E6242bmDrYFxqlAXIyeH hICJxONpHSwQtpjEhXvr2boYuTiEBKYzSuyc8Ykdwmlnktj6Zg8bSBWbgK7E7IPPGEFsEQE3 iabDM1lBipgF+hglrmzbATZKWMBJYv6r40DdHBwsAqoS694ag4R5BTwk2l6dZAUJSwgoSMyZ ZAMS5hTwlPjy+RPYSCGgkp/7DrFPYORdwMiwilE0tSC5oDgpPddIrzgxt7g0L10vOT93EyM4 cp5J72Bc1WBxiFGAg1GJh5cj3TZYiDWxrLgy9xCjBAezkgjvsUSgEG9KYmVValF+fFFpTmrx IcZkoJsmMkuJJucDozqvJN7Q2MTc1NjU0sTCxMySNGElcd6DrdaBQgLpiSWp2ampBalFMFuY ODilGhjNqnYYR/f8Tz/8O3HrvrBlm71a//kZl5+yla7LC/jMOOMN08raGi6D3Vt2p7RlOSo4 yYQ+eXbb33B+ydqMHVtvyngwuN9rlS/qlz3748qpxFVN67eEOsjua4y4PTPP3uhRQ0bnnL+r xRhtL7T5vTLNtBYvE7z5d19M5X7d+/c2JFZ/L36cLq/EUpyRaKjFXFScCADm7Ftz4AIAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Shirish S This patch implements the power on/off sequence of HDMI PHY in exynos5420 and exynos5250 as provided by the hardware team. This has been verified for mulitple iterations of S2R. Signed-off-by: Shirish S Signed-off-by: Rahul Sharma --- drivers/gpu/drm/exynos/exynos_hdmi.c | 40 +++++++++++++++++++++++++++++----- drivers/gpu/drm/exynos/regs-hdmi.h | 7 +++++- 2 files changed, 40 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c index 539e603..b2cbf43 100644 --- a/drivers/gpu/drm/exynos/exynos_hdmi.c +++ b/drivers/gpu/drm/exynos/exynos_hdmi.c @@ -1711,16 +1711,44 @@ static void hdmiphy_conf_reset(struct hdmi_context *hdata) static void hdmiphy_poweron(struct hdmi_context *hdata) { - if (hdata->type == HDMI_TYPE14) - hdmi_reg_writemask(hdata, HDMI_PHY_CON_0, 0, - HDMI_PHY_POWER_OFF_EN); + if (hdata->type != HDMI_TYPE14) + return; + + DRM_DEBUG_KMS("\n"); + + /* For PHY Mode Setting */ + hdmiphy_reg_writeb(hdata, HDMIPHY_MODE_SET_DONE, + HDMI_PHY_ENABLE_MODE_SET); + /* Phy Power On */ + hdmiphy_reg_writeb(hdata, HDMIPHY_POWER, + HDMI_PHY_POWER_ON); + /* For PHY Mode Setting */ + hdmiphy_reg_writeb(hdata, HDMIPHY_MODE_SET_DONE, + HDMI_PHY_DISABLE_MODE_SET); + /* PHY SW Reset */ + hdmiphy_conf_reset(hdata); } static void hdmiphy_poweroff(struct hdmi_context *hdata) { - if (hdata->type == HDMI_TYPE14) - hdmi_reg_writemask(hdata, HDMI_PHY_CON_0, ~0, - HDMI_PHY_POWER_OFF_EN); + if (hdata->type != HDMI_TYPE14) + return; + + DRM_DEBUG_KMS("\n"); + + /* PHY SW Reset */ + hdmiphy_conf_reset(hdata); + /* For PHY Mode Setting */ + hdmiphy_reg_writeb(hdata, HDMIPHY_MODE_SET_DONE, + HDMI_PHY_ENABLE_MODE_SET); + + /* PHY Power Off */ + hdmiphy_reg_writeb(hdata, HDMIPHY_POWER, + HDMI_PHY_POWER_OFF); + + /* For PHY Mode Setting */ + hdmiphy_reg_writeb(hdata, HDMIPHY_MODE_SET_DONE, + HDMI_PHY_DISABLE_MODE_SET); } static void hdmiphy_conf_apply(struct hdmi_context *hdata) diff --git a/drivers/gpu/drm/exynos/regs-hdmi.h b/drivers/gpu/drm/exynos/regs-hdmi.h index 344a5db..fd4c590 100644 --- a/drivers/gpu/drm/exynos/regs-hdmi.h +++ b/drivers/gpu/drm/exynos/regs-hdmi.h @@ -579,7 +579,12 @@ #define HDMI_TG_3D HDMI_TG_BASE(0x00F0) /* HDMI PHY Registers Offsets*/ -#define HDMIPHY_MODE_SET_DONE (0x7C >> 2) +#define HDMIPHY_POWER (0x74 >> 2) +#define HDMIPHY_MODE_SET_DONE (0x7c >> 2) + +/* HDMI PHY Values */ +#define HDMI_PHY_POWER_ON 0x80 +#define HDMI_PHY_POWER_OFF 0xff /* HDMI PHY Values */ #define HDMI_PHY_DISABLE_MODE_SET 0x80